Bill Pontikakis
Orcid: 0009-0001-5074-3473
According to our database1,
Bill Pontikakis
authored at least 8 papers
between 2002 and 2024.
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Bibliography
2024
IEEE Trans. Netw. Serv. Manag., February, 2024
2023
A Hardware Architecture of a Dynamic Ranking Packet Scheduler for Programmable Network Devices.
IEEE Access, 2023
2022
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022
2009
An All-digital Skew-adaptive Clock Scheduling Algorithm for Heterogeneous Multiprocessor Systems on Chips (MPSoCs).
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009
2007
A Low-Complexity High-Speed Clock Generator for Dynamic Frequency Scaling of FPGA and Standard-Cell Based Designs.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007
2006
A 0.8V algorithmically defined buffer and ring oscillator low-energy design for nanometer SoCs.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006
2005
Performance Improvement of Configurable Processor Architectures Using a Variable Clock Period.
Proceedings of the 5th IEEE International Workshop on System-on-Chip for Real-Time Applications (IWSOC 2005), 2005
2002
A novel double edge-triggered pulse-clocked TSPC D flip-flop for high-performance and low-power VLSI design applications.
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002