Jean-Pierre David
Orcid: 0000-0002-7707-0483
According to our database1,
Jean-Pierre David
authored at least 74 papers
between 1994 and 2024.
Collaborative distances:
Collaborative distances:
Timeline
Legend:
Book In proceedings Article PhD thesis Dataset OtherLinks
On csauthors.net:
Bibliography
2024
IEEE Trans. Netw. Serv. Manag., February, 2024
Temporal Logic Explanations for Dynamic Decision Systems Using Anchors and Monte Carlo Tree Search (Abstract Reprint).
Proceedings of the Thirty-Eighth AAAI Conference on Artificial Intelligence, 2024
2023
Temporal logic explanations for dynamic decision systems using anchors and Monte Carlo Tree Search.
Artif. Intell., May, 2023
A Hardware Architecture of a Dynamic Ranking Packet Scheduler for Programmable Network Devices.
IEEE Access, 2023
Low-Energy, Scalable, On-demand State-of-charge Estimation System for Li-ion batteries.
Proceedings of the 21st IEEE Interregional NEWCAS Conference, 2023
Iterative pruning algorithm for efficient look-up table implementation of binary neural networks.
Proceedings of the 21st IEEE Interregional NEWCAS Conference, 2023
Proceedings of the 21st IEEE Interregional NEWCAS Conference, 2023
Proceedings of the IEEE International Symposium on Circuits and Systems, 2023
Proceedings of the 28th Asia and South Pacific Design Automation Conference, 2023
2022
Proceedings of the 20th IEEE Interregional NEWCAS Conference, 2022
Low Complexity Shallow Neural Network With Improved False Negative Rate for Cyber Intrusion Detection Systems.
Proceedings of the 20th IEEE Interregional NEWCAS Conference, 2022
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022
2021
IEEE Trans. Circuits Syst. I Regul. Pap., 2021
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021
2020
J. Signal Process. Syst., 2020
Generic Wireless Power Transfer and Data Communication System Based on a Novel Modulation Technique.
IEEE Trans. Circuits Syst., 2020
Proceedings of Machine Learning and Systems 2020, 2020
Proceedings of the 28th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2020
On the Use of Interval Arithmetic for the Branch and Bound Delta-Lognormal Parameter Extraction of Rapid Human Movements.
Proceedings of the Lognormality Principle and its Applications in e-Security, 2020
2019
Proceedings of the Large-Scale Annotation of Biomedical Data and Expert Label Synthesis and Hardware Aware Learning for Medical Imaging and Computer Assisted Intervention, 2019
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019
Proceedings of the Interspeech 2019, 2019
Proceedings of the 2019 Conference on Design and Architectures for Signal and Image Processing, 2019
Proceedings of the 2019 IEEE Canadian Conference of Electrical and Computer Engineering, 2019
2018
ACM Trans. Reconfigurable Technol. Syst., 2018
An Evaluation of a High-Level Synthesis Approach to the FPGA-Based Submicrosecond Real-Time Simulation of Power Converters.
IEEE Trans. Ind. Electron., 2018
IEEE Access, 2018
Accelerating the Inference Phase in Ternary Convolutional Neural Networks Using Configurable Processors.
Proceedings of the 2018 Conference on Design and Architectures for Signal and Image Processing, 2018
POLYBiNN: A Scalable and Efficient Combinatorial Inference Engine for Neural Networks on FPGA.
Proceedings of the 2018 Conference on Design and Architectures for Signal and Image Processing, 2018
2017
J. Parallel Distributed Comput., 2017
Proceedings of the 15th IEEE International New Circuits and Systems Conference, 2017
Proceedings of the 20th IEEE International Symposium on Real-Time Distributed Computing, 2017
2015
Proceedings of the 3rd International Conference on Learning Representations, 2015
Proceedings of the International Conference on ReConFigurable Computing and FPGAs, 2015
BinaryConnect: Training Deep Neural Networks with binary weights during propagations.
Proceedings of the Advances in Neural Information Processing Systems 28: Annual Conference on Neural Information Processing Systems 2015, 2015
Proceedings of the 2015 IEEE International Parallel and Distributed Processing Symposium Workshop, 2015
Proceedings of the 2015 NASA/ESA Conference on Adaptive Hardware and Systems, 2015
2014
Comput. Electr. Eng., 2014
2013
Self-Alignment Schemes for the Implementation of Addition-Related Floating-Point Operators.
ACM Trans. Reconfigurable Technol. Syst., 2013
A fully automated reconfigurable calculation engine dedicated to the real-time simulation of high switching frequency power electronic circuits.
Math. Comput. Simul., 2013
Proceedings of the 2012 International Conference on Reconfigurable Computing and FPGAs, 2013
Hardware description and synthesis of control-intensive reconfigurable dataflow architectures (abstract only).
Proceedings of the 2013 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, 2013
Proceedings of the 21st IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2013
2012
A State-Space Modeling Approach for the FPGA-Based Real-Time Simulation of High Switching Frequency Power Converters.
IEEE Trans. Ind. Electron., 2012
Synchronized-transfer-level design methodology applied to hardware matrix multiplication.
Proceedings of the 2012 International Conference on Reconfigurable Computing and FPGAs, 2012
Effective floating-point calculation engines intended for the FPGA-based HIL simulation.
Proceedings of the 21st IEEE International Symposium on Industrial Electronics, 2012
Two-level configuration for FPGA: A new design methodology based on a computing fabric.
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012
Proceedings of the 22nd International Conference on Field Programmable Logic and Applications (FPL), 2012
2011
ACM Trans. Reconfigurable Technol. Syst., 2011
IEEE Trans. Instrum. Meas., 2011
2010
Proceedings of the ACM/SIGDA 18th International Symposium on Field Programmable Gate Arrays, 2010
Performing Floating-Point Accumulation on a Modern FPGA in Single and Double Precision.
Proceedings of the 18th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2010
2009
Proceedings of the ReConFig'09: 2009 International Conference on Reconfigurable Computing and FPGAs, 2009
2008
Microelectron. Reliab., 2008
Application Specific Instruction set processor specialized for block motion estimation.
Proceedings of the 26th International Conference on Computer Design, 2008
Proceedings of the 8th IEEE International Conference on Advanced Learning Technologies, 2008
Proceedings of the Compiler Construction, 17th International Conference, 2008
2007
IEEE Trans. Computers, 2007
2006
Proceedings of the 6th IEEE International Conference on Advanced Learning Technologies, 2006
Proceedings of the 6th IEEE International Conference on Advanced Learning Technologies, 2006
Proceedings of the 6th IEEE International Conference on Advanced Learning Technologies, 2006
Proceedings of the 6th IEEE International Conference on Advanced Learning Technologies, 2006
Proceedings of the 6th IEEE International Conference on Advanced Learning Technologies, 2006
2005
Proceedings of the 16th IEEE International Workshop on Rapid System Prototyping (RSP 2005), 2005
2004
Proceedings of the 4th IEEE International Workshop on System-on-Chip for Real-Time Applications (IWSOC'04), 2004
Proceedings of the Forum on specification and Design Languages, 2004
2002
Proceedings of the Field-Programmable Logic and Applications, 2002
Proceedings of the Field-Programmable Logic and Applications, 2002
2001
Implementation of very large dataflow graphs on a reconfigurable architecture for robotic applications.
Proceedings of the 15th International Parallel & Distributed Processing Symposium (IPDPS-01), 2001
1998
Proceedings of the Ninth IEEE International Workshop on Rapid System Prototyping (RSP 1998), 1998
1996
Proceedings of the Computer Aided Learning and Instruction in Science and Engineering, 1996
1994