Bodhisatwa Mazumdar

Orcid: 0000-0003-1883-4639

Affiliations:
  • Indian Institute of Technology Indore, India
  • New York University Abu Dhabi, UAE (former)
  • Indian Institute of Technology Kharagpur, India (PhD 2015)


According to our database1, Bodhisatwa Mazumdar authored at least 49 papers between 2006 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2024
A novel minutiae-oriented approach for partial fingerprint-based MasterPrint mitigation.
Pattern Recognit., January, 2024

2023
SPSA: Semi-Permanent Stuck-At fault analysis of AES Rijndael SBox.
J. Cryptogr. Eng., June, 2023

2021
Entropy Reduction Model for Pinpointing Differential Fault Analysis on SIMON and SIMECK Ciphers.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021

mMIG: Inversion optimization in majority inverter graph with minority operations.
Integr., 2021

IoTHunter: IoT network traffic classification using device specific keywords.
IET Networks, 2021

A Semi-Permanent Stuck-At Fault Analysis on AES Rijndael SBox.
IACR Cryptol. ePrint Arch., 2021

Single Event Transient Fault Analysis of ELEPHANT cipher.
CoRR, 2021

On the Prospects of Latent MasterPrints.
Proceedings of the Computer Vision and Image Processing - 6th International Conference, 2021

2020
Removal Attacks on Logic Locking and Camouflaging Techniques.
IEEE Trans. Emerg. Top. Comput., 2020

Logic Locking With Provable Security Against Power Analysis Attacks.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

A comprehensive security analysis of match-in-database fingerprint biometric system.
Pattern Recognit. Lett., 2020

Correlation Power Analysis of KASUMI and Power Resilience Analysis of Some Equivalence Classes of KASUMI S-Boxes.
J. Hardw. Syst. Secur., 2020

ExtPFA: Extended Persistent Fault Analysis for Deeper Rounds of Bit Permutation Based Ciphers with a Case Study on GIFT.
Proceedings of the Security, Privacy, and Applied Cryptography Engineering, 2020

Efficient Keyword Matching for Deep Packet Inspection based Network Traffic Classification.
Proceedings of the 2020 International Conference on COMmunication Systems & NETworkS, 2020

Revisiting Persistent Fault Analysis: Assessing Weak Keys and Strong Keys in GIFT-64 Lightweight Cipher.
Proceedings of the Asian Hardware Oriented Security and Trust Symposium, 2020

2019
A Subset Fault Analysis of ASCON.
IACR Cryptol. ePrint Arch., 2019

Classical Cryptanalysis Attacks on Logic Locking Techniques.
J. Electron. Test., 2019

A Novel Approach for Partial Fingerprint Identification to Mitigate MasterPrint Generation.
CoRR, 2019

Linear Approximation and Differential Attacks on Logic Locking Techniques.
Proceedings of the 32nd International Conference on VLSI Design and 18th International Conference on Embedded Systems, 2019

2018
Security Vulnerabilities Against Fingerprint Biometric System.
CoRR, 2018

Correlation Power Analysis on KASUMI: Attack and Countermeasure.
Proceedings of the Security, Privacy, and Applied Cryptography Engineering, 2018

2017
Timing Attack and Countermeasure on NEMS Relay Based Design of Block Ciphers.
IEEE Trans. Emerg. Top. Comput., 2017

A Combined Power and Fault Analysis Attack on Protected Grain Family of Stream Ciphers.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2017

Construction of Rotation Symmetric S-Boxes with High Nonlinearity and Improved DPA Resistivity.
IEEE Trans. Computers, 2017

Redefining the transparency order.
Des. Codes Cryptogr., 2017

TTLock: Tenacious and traceless logic locking.
Proceedings of the 2017 IEEE International Symposium on Hardware Oriented Security and Trust, 2017

2016
A Compact Implementation of Salsa20 and Its Power Analysis Vulnerabilities.
ACM Trans. Design Autom. Electr. Syst., 2016

A Comparative Security Analysis of Current and Emerging Technologies.
IEEE Micro, 2016

Security Analysis of Anti-SAT.
IACR Cryptol. ePrint Arch., 2016

Thwarting timing attacks on NEMS relay based designs.
Proceedings of the 34th IEEE VLSI Test Symposium, 2016

Power-side-channel analysis of carbon nanotube FET based design.
Proceedings of the 22nd IEEE International Symposium on On-Line Testing and Robust System Design, 2016

CamoPerturb: secure IC camouflaging for minterm protection.
Proceedings of the 35th International Conference on Computer-Aided Design, 2016

SARLock: SAT attack resistant logic locking.
Proceedings of the 2016 IEEE International Symposium on Hardware Oriented Security and Trust, 2016

2015
Combined Side-Channel and Fault Analysis Attack on Protected Grain Family of Stream Ciphers.
IACR Cryptol. ePrint Arch., 2015

Construction of RSBFs with improved cryptographic properties to resist differential fault attack on grain family of stream ciphers.
Cryptogr. Commun., 2015

Timing attack on NEMS relay based design of AES.
Proceedings of the 2015 IFIP/IEEE International Conference on Very Large Scale Integration, 2015

Modified Transparency Order Property: Solution or Just Another Attempt.
Proceedings of the Security, Privacy, and Applied Cryptography Engineering, 2015

Power analysis attacks on ARX: An application to Salsa20.
Proceedings of the 21st IEEE International On-Line Testing Symposium, 2015

A practical DPA on Grain v1 using LS-SVM.
Proceedings of the IEEE International Symposium on Hardware Oriented Security and Trust, 2015

Security analysis of logic encryption against the most effective side-channel attack: DPA.
Proceedings of the 2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2015

2014
Redefining the Transparency Order.
IACR Cryptol. ePrint Arch., 2014

Fibonacci LFSR vs. Galois LFSR: Which is More Vulnerable to Power Attacks?
Proceedings of the Security, Privacy, and Applied Cryptography Engineering, 2014

Some RSSB constructions with improved resistance towards differential power analysis.
Proceedings of the 9th Workshop on Embedded Systems Security, 2014

2013
Constrained Search for a Class of Good Bijective S-Boxes With Improved DPA Resistivity.
IEEE Trans. Inf. Forensics Secur., 2013

A Fault Analysis Perspective for Testing of Secured SoC Cores.
IEEE Des. Test, 2013

Design and implementation of rotation symmetric S-boxes with high nonlinearity and high DPA resilience.
Proceedings of the 2013 IEEE International Symposium on Hardware-Oriented Security and Trust, 2013

2012
Constrained Search for a Class of Good S-Boxes with Improved DPA Resistivity.
IACR Cryptol. ePrint Arch., 2012

Design for Security of Block Cipher S-Boxes to Resist Differential Power Attacks.
Proceedings of the 25th International Conference on VLSI Design, 2012

2006
A Real Time Speckle Noise Cleaning Filter for Ultrasound Images.
Proceedings of the 19th IEEE International Symposium on Computer-Based Medical Systems (CBMS 2006), 2006


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