Subidh Ali

Orcid: 0000-0001-5942-4455

Affiliations:
  • Indian Institute of Technology, Kharagpur


According to our database1, Subidh Ali authored at least 44 papers between 2010 and 2023.

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Bibliography

2023
On Securing Cryptographic ICs against Scan-based Attacks: A Hamming Weight Distribution Perspective.
ACM J. Emerg. Technol. Comput. Syst., April, 2023

Security Analysis of Scan Obfuscation Techniques.
IEEE Trans. Inf. Forensics Secur., 2023

RoboSense At Edge: Detecting Slip, Crumple and Shape of the Object in Robotic Hand for Teleoprations.
CoRR, 2023

Vulnerability of Dynamic Masking in Test Compression.
Proceedings of the Security, Privacy, and Applied Cryptography Engineering, 2023

2022
Evaluating Security of New Locking SIB-based Architectures.
Proceedings of the IEEE European Test Symposium, 2022

2021
Security Analysis of State-of-the-art Scan Obfuscation Technique.
Proceedings of the 39th IEEE International Conference on Computer Design, 2021

Opacity preserving Countermeasure using Finite State Machines against Differential Scan Attacks.
Proceedings of the 26th IEEE European Test Symposium, 2021

2020
Revisiting the security of static masking and compaction: Discovering new vulnerability and Improved Scan Attack on AES.
Proceedings of the Asian Hardware Oriented Security and Trust Symposium, 2020

2019
Guest Editorial SPACE 2017 Special Issue in the Journal of Hardware and Systems Security (HaSS).
J. Hardw. Syst. Secur., 2019

2017
Timing Attack and Countermeasure on NEMS Relay Based Design of Block Ciphers.
IEEE Trans. Emerg. Top. Comput., 2017

2016
A Compact Implementation of Salsa20 and Its Power Analysis Vulnerabilities.
ACM Trans. Design Autom. Electr. Syst., 2016

Security Assessment of Cyberphysical Digital Microfluidic Biochips.
IEEE ACM Trans. Comput. Biol. Bioinform., 2016

A Comparative Security Analysis of Current and Emerging Technologies.
IEEE Micro, 2016

Supply-Chain Security of Digital Microfluidic Biochips.
Computer, 2016

Thwarting timing attacks on NEMS relay based designs.
Proceedings of the 34th IEEE VLSI Test Symposium, 2016

Power-side-channel analysis of carbon nanotube FET based design.
Proceedings of the 22nd IEEE International Symposium on On-Line Testing and Robust System Design, 2016

Microfluidic encryption of on-chip biochemical assays.
Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2016

2015
Novel Test-Mode-Only Scan Attack and Countermeasure for Compression-Based Scan Architectures.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2015

TMO: A new class of attack on cipher misusing test infrastructure.
Proceedings of the 33rd IEEE VLSI Test Symposium, 2015

Timing attack on NEMS relay based design of AES.
Proceedings of the 2015 IFIP/IEEE International Conference on Very Large Scale Integration, 2015

A secure design-for-test infrastructure for lifetime security of SoCs.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

Power analysis attacks on ARX: An application to Salsa20.
Proceedings of the 21st IEEE International On-Line Testing Symposium, 2015

Security implications of cyberphysical digital microfluidic biochips.
Proceedings of the 33rd IEEE International Conference on Computer Design, 2015

Security analysis of logic encryption against the most effective side-channel attack: DPA.
Proceedings of the 2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2015

Scan attack on Elliptic Curve Cryptosystem.
Proceedings of the 2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2015

2014
AES design space exploration new line for scan attack resiliency.
Proceedings of the 22nd International Conference on Very Large Scale Integration, 2014

Test-mode-only scan attack and countermeasure for contemporary scan architectures.
Proceedings of the 2014 International Test Conference, 2014

New scan attacks against state-of-the-art countermeasures and DFT.
Proceedings of the 2014 IEEE International Symposium on Hardware-Oriented Security and Trust, 2014

Test-mode-only scan attack using the boundary scan chain.
Proceedings of the 19th IEEE European Test Symposium, 2014

2013
Differential fault analysis of AES: towards reaching its limits.
J. Cryptogr. Eng., 2013

A Fault Analysis Perspective for Testing of Secured SoC Cores.
IEEE Des. Test, 2013

New Scan-Based Attack Using Only the Test Mode and an Input Corruption Countermeasure.
Proceedings of the VLSI-SoC: At the Crossroads of Emerging Trends, 2013

New scan-based attack using only the test mode.
Proceedings of the 21st IEEE/IFIP International Conference on VLSI and System-on-Chip, 2013

Scan attack in presence of mode-reset countermeasure.
Proceedings of the 2013 IEEE 19th International On-Line Testing Symposium (IOLTS), 2013

Improved Differential Fault Analysis of CLEFIA.
Proceedings of the 2013 Workshop on Fault Diagnosis and Tolerance in Cryptography, 2013

2012
Protecting Last Four Rounds of CLEFIA is Not Enough Against Differential Fault Analysis.
IACR Cryptol. ePrint Arch., 2012

Differential Fault Analysis of Twofish.
Proceedings of the Information Security and Cryptology - 8th International Conference, 2012

2011
Differential Fault Analysis of the Advanced Encryption Standard Using a Single Fault.
Proceedings of the Information Security Theory and Practice. Security and Privacy of Mobile Devices in Wireless Communication, 2011

A Differential Fault Analysis on AES Key Schedule Using Single Fault.
Proceedings of the 2011 Workshop on Fault Diagnosis and Tolerance in Cryptography, 2011

Multi-level attacks: An emerging security concern for cryptographic hardware.
Proceedings of the Design, Automation and Test in Europe, 2011

Differential Fault Analysis of AES-128 Key Schedule Using a Single Multi-byte Fault.
Proceedings of the Smart Card Research and Advanced Applications, 2011

An Improved Differential Fault Analysis on AES-256.
Proceedings of the Progress in Cryptology - AFRICACRYPT 2011, 2011

2010
Differential Fault Analysis of AES using a Single Multiple-Byte Fault.
IACR Cryptol. ePrint Arch., 2010

Acceleration of Differential Fault Analysis of the Advanced Encryption Standard Using Single Fault.
IACR Cryptol. ePrint Arch., 2010


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