Boxun Xu

Orcid: 0009-0003-2896-6632

According to our database1, Boxun Xu authored at least 12 papers between 2022 and 2025.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2025
Khan-GCL: Kolmogorov-Arnold Network Based Graph Contrastive Learning with Hard Negatives.
CoRR, May, 2025

SpikeX: Exploring Accelerator Architecture and Network-Hardware Co-Optimization for Sparse Spiking Neural Networks.
CoRR, May, 2025

Bishop: Sparsified Bundling Spiking Transformers on Heterogeneous Cores with Error-constrained Pruning.
Proceedings of the 52nd Annual International Symposium on Computer Architecture, 2025

2024
AIMMI: Audio and Image Multi-Modal Intelligence via a Low-Power SoC With 2-MByte On-Chip MRAM for IoT Devices.
IEEE J. Solid State Circuits, October, 2024

Towards 3D Acceleration for low-power Mixture-of-Experts and Multi-Head Attention Spiking Transformers.
CoRR, 2024

Trimming Down Large Spiking Vision Transformers via Heterogeneous Quantization Search.
CoRR, 2024

DS2TA: Denoising Spiking Transformer with Attenuated Spatiotemporal Attention.
CoRR, 2024

ADO-LLM: Analog Design Bayesian Optimization with In-Context Learning of Large Language Models.
Proceedings of the 43rd IEEE/ACM International Conference on Computer-Aided Design, 2024

Spiking Transformer Hardware Accelerators in 3D Integration.
Proceedings of the 43rd IEEE/ACM International Conference on Computer-Aided Design, 2024

2023
DISTA: Denoising Spiking Transformer with intrinsic plasticity and spatiotemporal attention.
CoRR, 2023

UPAR: A Kantian-Inspired Prompting Framework for Enhancing Large Language Model Capabilities.
CoRR, 2023

2022
Audio and Image Cross-Modal Intelligence via a 10TOPS/W 22nm SoC with Back-Propagation and Dynamic Power Gating.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022


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