Brice Colombier
Orcid: 0000-0002-6028-3028
According to our database1,
Brice Colombier
authored at least 33 papers
between 2013 and 2024.
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Bibliography
2024
Cryptogr. Commun., September, 2024
Cross-layer analysis of clock glitch fault injection while fetching variable-length instructions.
J. Cryptogr. Eng., June, 2024
IACR Cryptol. ePrint Arch., 2024
2023
Punctured Syndrome Decoding Problem Efficient Side-Channel Attacks Against Classic McEliece.
IACR Cryptol. ePrint Arch., 2023
Microarchitectural Insights into Unexplained Behaviors Under Clock Glitch Fault Injection.
Proceedings of the Smart Card Research and Advanced Applications, 2023
Proceedings of the Asian Hardware Oriented Security and Trust Symposium, 2023
Proceedings of the Progress in Cryptology - AFRICACRYPT 2023, 2023
2022
Profiled Side-Channel Attack on Cryptosystems Based on the Binary Syndrome Decoding Problem.
IEEE Trans. Inf. Forensics Secur., 2022
IACR Cryptol. ePrint Arch., 2022
Key-Recovery by Side-Channel Information on the Matrix-Vector Product in Code-Based Cryptosystems.
Proceedings of the Information Security and Cryptology - ICISC 2022, 2022
Proceedings of the 25th Euromicro Conference on Digital System Design, 2022
2021
Proceedings of the Advances in Cryptology - EUROCRYPT 2021, 2021
Microarchitecture-aware Fault Models: Experimental Evidence and Cross-Layer Inference Methodology.
Proceedings of the 16th International Conference on Design & Technology of Integrated Systems in Nanoscale Era, 2021
Multi-Spot Laser Fault Injection Setup: New Possibilities for Fault Injection Attacks.
Proceedings of the Smart Card Research and Advanced Applications, 2021
2020
Int. J. Comput. Commun. Control, August, 2020
IACR Cryptol. ePrint Arch., 2020
IACR Cryptol. ePrint Arch., 2020
Proceedings of the 17th Workshop on Fault Detection and Tolerance in Cryptography, 2020
Backtracking Search for Optimal Parameters of a PLL-based True Random Number Generator.
Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020
Online Performance Evaluation of Deep Learning Networks for Profiled Side-Channel Analysis.
Proceedings of the Constructive Side-Channel Analysis and Secure Design, 2020
2019
2018
Laser-induced Single-bit Faults in Flash Memory: Instructions Corruption on a 32-bit Microcontroller.
IACR Cryptol. ePrint Arch., 2018
2017
IEEE Trans. Inf. Forensics Secur., 2017
Proceedings of the 2017 IEEE Computer Society Annual Symposium on VLSI, 2017
Proceedings of the International Conference on Field Programmable Technology, 2017
Proceedings of the 27th International Conference on Field Programmable Logic and Applications, 2017
2016
Comments on "A PUF-FSM Binding Scheme for FPGA IP Protection and Pay-per-Device Licensing".
IEEE Trans. Inf. Forensics Secur., 2016
2015
Reversible Denial-of-Service by Locking Gates Insertion for IP Cores Design Protection.
Proceedings of the 2015 IEEE Computer Society Annual Symposium on VLSI, 2015
Proceedings of the 23rd IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2015
2014
Survey of hardware protection of design data for integrated circuits and intellectual properties.
IET Comput. Digit. Tech., 2014
2013
Proceedings of the Progress in Cryptology - INDOCRYPT 2013, 2013