Jean-Max Dutertre

According to our database1, Jean-Max Dutertre authored at least 48 papers between 2001 and 2018.

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2018
Assessing body built-in current sensors for detection of multiple transient faults.
Microelectronics Reliability, 2018

Laser-induced Single-bit Faults in Flash Memory: Instructions Corruption on a 32-bit Microcontroller.
IACR Cryptology ePrint Archive, 2018

Standard CAD Tool-Based Method for Simulation of Laser-Induced Faults in Large-Scale Circuits.
Proceedings of the 2018 International Symposium on Physical Design, 2018

The case of using CMOS FD-SOI rather than CMOS bulk to harden ICs against laser attacks.
Proceedings of the 24th IEEE International Symposium on On-Line Testing And Robust System Design, 2018

2017
Method for evaluation of transient-fault detection techniques.
Microelectronics Reliability, 2017

Importance of IR drops on the modeling of laser-induced transient faults.
Proceedings of the 14th International Conference on Synthesis, 2017

Role of Laser-Induced IR Drops in the Occurrence of Faults: Assessment and Simulation.
Proceedings of the Euromicro Conference on Digital System Design, 2017

2016
Frontside Versus Backside Laser Injection: A Comparative Study.
JETC, 2016

Body Biasing Injection Attacks in Practice.
Proceedings of the Third Workshop on Cryptography and Security in Computing Systems, 2016

On the use of Forward Body Biasing to decrease the repeatability of laser-induced faults.
Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016

Photonic Power Firewalls.
Proceedings of the New Codebreakers, 2016

2015
Electrical model of an inverter body-biased structure in triple-well technology under pulsed photoelectric laser stimulation.
Microelectronics Reliability, 2015

Figure of Merits of 28nm Si Technologies for Implementing Laser Attack Resistant Security Dedicated Circuits.
Proceedings of the 2015 IEEE Computer Society Annual Symposium on VLSI, 2015

Electrical model of an NMOS body biased structure in triple-well technology under photoelectric laser stimulation.
Proceedings of the IEEE International Reliability Physics Symposium, 2015

Laser fault injection into SRAM cells: Picosecond versus nanosecond pulses.
Proceedings of the 21st IEEE International On-Line Testing Symposium, 2015

Experimental validation of a Bulk Built-In Current Sensor for detecting laser-induced currents.
Proceedings of the 21st IEEE International On-Line Testing Symposium, 2015

Evidence of an information leakage between logically independent blocks.
Proceedings of the Second Workshop on Cryptography and Security in Computing Systems, 2015

SEU sensitivity and modeling using pico-second pulsed laser stimulation of a D Flip-Flop in 40 nm CMOS technology.
Proceedings of the 2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2015

Influence of triple-well technology on laser fault injection and laser sensor efficiency.
Proceedings of the 2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2015

2014
Improving the ability of Bulk Built-In Current Sensors to detect Single Event Effects by using triple-well CMOS.
Microelectronics Reliability, 2014

Electromagnetic analysis and fault injection onto secure circuits.
Proceedings of the 22nd International Conference on Very Large Scale Integration, 2014



Analysis of the fault injection mechanism related to negative and positive power supply glitches using an on-chip voltmeter.
Proceedings of the 2014 IEEE International Symposium on Hardware-Oriented Security and Trust, 2014

Laser attacks on integrated circuits: From CMOS to FD-SOI.
Proceedings of the 9th International Conference on Design & Technology of Integrated Systems in Nanoscale Era, 2014

Efficiency of a glitch detector against electromagnetic fault injection.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014

Evidence of a Larger EM-Induced Fault Model.
Proceedings of the Smart Card Research and Advanced Applications, 2014

2013
Electrical modeling of the photoelectric effect induced by a pulsed laser applied to an SRAM cell.
Microelectronics Reliability, 2013

Sensitivity tuning of a bulk built-in current sensor for optimal transient-fault detection.
Microelectronics Reliability, 2013

Practical measurements of data path delays for IP authentication & integrity verification.
Proceedings of the 2013 8th International Workshop on Reconfigurable and Communication-Centric Systems-on-Chip (ReCoSoC), 2013

A single built-in sensor to check pull-up and pull-down CMOS networks against transient faults.
Proceedings of the 2013 23rd International Workshop on Power and Timing Modeling, 2013

Power supply glitch induced faults on FPGA: An in-depth analysis of the injection mechanism.
Proceedings of the 2013 IEEE 19th International On-Line Testing Symposium (IOLTS), 2013

Frontside laser fault injection on cryptosystems - Application to the AES' last round -.
Proceedings of the 2013 IEEE International Symposium on Hardware-Oriented Security and Trust, 2013

A bulk built-in sensor for detection of fault attacks.
Proceedings of the 2013 IEEE International Symposium on Hardware-Oriented Security and Trust, 2013

Fault Model Analysis of Laser-Induced Faults in SRAM Memory Cells.
Proceedings of the 2013 Workshop on Fault Diagnosis and Tolerance in Cryptography, 2013

Robustness improvement of an SRAM cell against laser-induced fault injection.
Proceedings of the 2013 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2013

Differential analysis of Round-Reduced AES faulty ciphertexts.
Proceedings of the 2013 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2013

Electromagnetic Glitch on the AES Round Counter.
Proceedings of the Constructive Side-Channel Analysis and Secure Design, 2013

2012
Building the electrical model of the Photoelectric Laser Stimulation of a PMOS transistor in 90 nm technology.
Microelectronics Reliability, 2012

Injection of transient faults using electromagnetic pulses -Practical results on a cryptographic system-.
IACR Cryptology ePrint Archive, 2012

Fault Round Modification Analysis of the advanced encryption standard.
Proceedings of the 2012 IEEE International Symposium on Hardware-Oriented Security and Trust, 2012

A DFA on AES Based on the Entropy of Error Distributions.
Proceedings of the 2012 Workshop on Fault Diagnosis and Tolerance in Cryptography, 2012

Electromagnetic Transient Faults Injection on a Hardware and a Software Implementations of AES.
Proceedings of the 2012 Workshop on Fault Diagnosis and Tolerance in Cryptography, 2012

2011
Design and characterisation of an AES chip embedding countermeasures.
IJIEI, 2011

A side-channel and fault-attack resistant AES circuit working on duplicated complemented values.
Proceedings of the IEEE International Solid-State Circuits Conference, 2011

2010
How to flip a bit?
Proceedings of the 16th IEEE International On-Line Testing Symposium (IOLTS 2010), 2010

When Clocks Fail: On Critical Paths and Clock Faults.
Proceedings of the Smart Card Research and Advanced Application, 2010

2001
Integration of Robustness in the Design of a Cell.
Proceedings of the SOC Design Methodologies, 2001


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