Jean-Baptiste Rigaud
Orcid: 0000-0001-7394-5345
According to our database1,
Jean-Baptiste Rigaud
authored at least 53 papers
between 2001 and 2023.
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Bibliography
2023
Microprocess. Microsystems, 2023
CIFER: Code Integrity and control Flow verification for programs Executed on a RISC-V core.
Proceedings of the IEEE International Symposium on Hardware Oriented Security and Trust, 2023
Lightweight Countermeasures Against Original Linear Code Extraction Attacks on a RISC-V Core.
Proceedings of the IEEE International Symposium on Hardware Oriented Security and Trust, 2023
Proceedings of the Workshop on Fault Detection and Tolerance in Cryptography, 2023
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023
Proceedings of the Constructive Side-Channel Analysis and Secure Design, 2023
Like an Open Book? Read Neural Network Architecture with Simple Power Analysis on 32-Bit Microcontrollers.
Proceedings of the Smart Card Research and Advanced Applications, 2023
2022
An Experimentally Tuned Compact Electrical Model for Laser Fault Injection Simulation.
Proceedings of the 28th IEEE International Symposium on On-Line Testing and Robust System Design, 2022
Proceedings of the 29th IEEE International Conference on Electronics, Circuits and Systems, 2022
Proceedings of the 25th Euromicro Conference on Digital System Design, 2022
A Practical Introduction to Side-Channel Extraction of Deep Neural Network Parameters.
Proceedings of the Smart Card Research and Advanced Applications, 2022
2021
Proceedings of the 7th IEEE World Forum on Internet of Things, 2021
Proceedings of the Seventh International Conference on Mathematics and Computing, 2021
Proceedings of the Smart Card Research and Advanced Applications, 2021
Proceedings of the 30th IEEE Asian Test Symposium, 2021
2020
Multiplication over Extension Fields for Pairing-based Cryptography: an Hardware Point of View.
IACR Cryptol. ePrint Arch., 2020
Proceedings of the 33rd Symposium on Integrated Circuits and Systems Design, 2020
Proceedings of the 17th Workshop on Fault Detection and Tolerance in Cryptography, 2020
Proceedings of the 15th Design & Technology of Integrated Systems in Nanoscale Era, 2020
2019
Proceedings of the Secure IT Systems, 2019
Proceedings of the 2019 Workshop on Fault Diagnosis and Tolerance in Cryptography, 2019
2018
Laser-induced Single-bit Faults in Flash Memory: Instructions Corruption on a 32-bit Microcontroller.
IACR Cryptol. ePrint Arch., 2018
2017
A Scalable and Systolic Architectures of Montgomery Modular Multiplication for Public Key Cryptosystems Based on DSPs.
J. Hardw. Syst. Secur., 2017
2016
A Systolic Hardware Architectures of Montgomery Modular Multiplication for Public Key Cryptosystems.
IACR Cryptol. ePrint Arch., 2016
Proceedings of the Third Workshop on Cryptography and Security in Computing Systems, 2016
Proceedings of the 2016 Workshop on Fault Diagnosis and Tolerance in Cryptography, 2016
On the use of Forward Body Biasing to decrease the repeatability of laser-induced faults.
Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016
Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016
High-Performance Elliptic Curve Cryptography by Using the CIOS Method for Modular Multiplication.
Proceedings of the Risks and Security of Internet and Systems, 2016
2015
Proceedings of the 21st IEEE International On-Line Testing Symposium, 2015
Proceedings of the IEEE International Symposium on Hardware Oriented Security and Trust, 2015
Proceedings of the Second Workshop on Cryptography and Security in Computing Systems, 2015
Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015
2014
Proceedings of the 2014 IEEE International Symposium on Hardware-Oriented Security and Trust, 2014
Proceedings of the First Workshop on Cryptography and Security in Computing Systems, 2014
Proceedings of the 17th Euromicro Conference on Digital System Design, 2014
2013
Proceedings of the 16th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2013
2011
Int. J. Intell. Eng. Informatics, 2011
A side-channel and fault-attack resistant AES circuit working on duplicated complemented values.
Proceedings of the IEEE International Solid-State Circuits Conference, 2011
2010
Experimental Fault Injection based on the Prototyping of an AES Cryptosystem.
Proceedings of the 5th International Workshop on Reconfigurable Communication-centric Systems on Chip, 2010
2008
Proceedings of the Fifth International Workshop on Fault Diagnosis and Tolerance in Cryptography, 2008
2007
IET Inf. Secur., 2007
Experimental evaluation of protections against laser-induced faults and consequences on fault modeling.
Proceedings of the 2007 Design, Automation and Test in Europe Conference and Exposition, 2007
2006
Integrated Evaluation Platform for Secured Devices.
Proceedings of the 2nd International Workshop on Reconfigurable Communication-centric Systems-on-Chip, 2006
2005
Proceedings of the 2005 Design, 2005
2003
Proceedings of the Integrated Circuit and System Design, 2003
An Approach to the Introduction of Formal Validation in an Asynchronous Circuit Design Flow.
Proceedings of the 36th Hawaii International Conference on System Sciences (HICSS-36 2003), 2003
2002
Spécification de bibliothèques pour la synthèse de circuits asynchrones. (Libraries specification for the synthesis of asynchronous circuits).
PhD thesis, 2002
Proceedings of the Field-Programmable Logic and Applications, 2002
High-Level Modeling and Design of Asynchronous Arbiters for On-Chip Communication Systems.
Proceedings of the 2002 Design, 2002
2001
Modeling and Design of Asynchronous Priority Arbiters for On-Chip Communication Systems.
Proceedings of the SOC Design Methodologies, 2001