Viktor Fischer

According to our database1, Viktor Fischer authored at least 57 papers between 2001 and 2018.

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Bibliography

2018
Evaluation and Monitoring of Free Running Oscillators Serving as Source of Randomness.
IACR Trans. Cryptogr. Hardw. Embed. Syst., 2018

Implementation and Characterization of a Physical Unclonable Function for IoT: A Case Study With the TERO-PUF.
IEEE Trans. on CAD of Integrated Circuits and Systems, 2018

Design and testing methodologies for true random number generators towards industry certification.
Proceedings of the 23rd IEEE European Test Symposium, 2018

Optimization of the PLL configuration in a PLL-based TRNG design.
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018

2017
Key Reconciliation Protocols for Error Correction of Silicon PUF Responses.
IEEE Trans. Information Forensics and Security, 2017

Efficient design of Oscillator based Physical Unclonable Functions on Flash FPGAs.
Proceedings of the IEEE 2nd International Verification and Security Workshop, 2017

Optimization of the PLL based TRNG design using the genetic algorithm.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017

Complete activation scheme for FPGA-oriented IP cores design protection.
Proceedings of the 27th International Conference on Field Programmable Logic and Applications, 2017

2016
Fault model of electromagnetic attacks targeting ring oscillator-based true random number generators.
J. Cryptographic Engineering, 2016

Key Reconciliation Protocols for Error Correction of Silicon PUF Responses.
IACR Cryptology ePrint Archive, 2016

A survey of AIS-20/31 compliant TRNG cores suitable for FPGA devices.
Proceedings of the 26th International Conference on Field Programmable Logic and Applications, 2016

2015
Disposable configuration of remotely reconfigurable systems.
Microprocessors and Microsystems - Embedded Hardware Design, 2015

An Ultra-Lightweight Transmitter for Contactless Rapid Identification of Embedded IP in FPGA.
Embedded Systems Letters, 2015

Contactless transmission of intellectual property data to protect FPGA designs.
Proceedings of the 2015 IFIP/IEEE International Conference on Very Large Scale Integration, 2015

Electromagnetic Transmission of Intellectual Property Data to Protect FPGA Designs.
Proceedings of the VLSI-SoC: Design for Reliability, Security, and Low Power, 2015

A Physical Approach for Stochastic Modeling of TERO-Based TRNG.
Proceedings of the Cryptographic Hardware and Embedded Systems - CHES 2015, 2015

2014
A PUF Based on a Transient Effect Ring Oscillator and Insensitive to Locking Phenomenon.
IEEE Trans. Emerging Topics Comput., 2014

Electromagnetic analysis and fault injection onto secure circuits.
Proceedings of the 22nd International Conference on Very Large Scale Integration, 2014

On the assumption of mutual independence of jitter realizations in P-TRNG stochastic models.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014

Embedded Evaluation of Randomness in Oscillator Based Elementary TRNG.
Proceedings of the Cryptographic Hardware and Embedded Systems - CHES 2014, 2014

2013
Architectures of flexible symmetric key crypto engines - a survey: From hardware coprocessor to multi-crypto-processor system on chip.
ACM Comput. Surv., 2013

New universal element with integrated PUF and TRNG capability.
Proceedings of the 2012 International Conference on Reconfigurable Computing and FPGAs, 2013

Electromagnetic analysis on ring oscillator-based true random number generators.
Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013

An open-source multi-FPGA modular system for fair benchmarking of True Random Number Generators.
Proceedings of the 23rd International Conference on Field programmable Logic and Applications, 2013

A Very High Speed True Random Number Generator with Entropy Assessment.
Proceedings of the Cryptographic Hardware and Embedded Systems - CHES 2013, 2013

A Self-Timed Ring Based True Random Number Generator.
Proceedings of the 19th IEEE International Symposium on Asynchronous Circuits and Systems, 2013

2012
Secure Extension of FPGA General Purpose Processors for Symmetric Key Cryptography with Partial Reconfiguration Capabilities.
TRETS, 2012

Implementation of Ring-Oscillators-Based Physical Unclonable Functions with Independent Bits in the Response.
Int. J. Reconfig. Comp., 2012

Two IP protection schemes for multi-FPGA systems.
Proceedings of the 2012 International Conference on Reconfigurable Computing and FPGAs, 2012

Comparison of Self-Timed Ring and Inverter Ring Oscillators as entropy sources in FPGAs.
Proceedings of the 2012 Design, Automation & Test in Europe Conference & Exhibition, 2012

A Closer Look at Security in Random Number Generators Design.
Proceedings of the Constructive Side-Channel Analysis and Secure Design, 2012

Contactless Electromagnetic Active Attack on Ring Oscillator Based True Random Number Generator.
Proceedings of the Constructive Side-Channel Analysis and Secure Design, 2012

2011
Secure extensions of FPGA soft core processors for symmetric key cryptography.
Proceedings of the 6th International Workshop on Reconfigurable Communication-centric Systems-on-Chip, 2011

Cryptographic Extension for Soft General-Purpose Processors with Secure Key Management.
Proceedings of the International Conference on Field Programmable Logic and Applications, 2011

2010
True-Randomness and Pseudo-Randomness in Ring Oscillator-Based True Random Number Generators.
Int. J. Reconfig. Comp., 2010

HCrypt: A Novel Concept of Crypto-processor with Secured Key Management.
Proceedings of the ReConFig'10: 2010 International Conference on Reconfigurable Computing and FPGAs, 2010

Analysis and Enhancement of Ring Oscillators Based Physical Unclonable Functions in FPGAs.
Proceedings of the ReConFig'10: 2010 International Conference on Reconfigurable Computing and FPGAs, 2010

Characterization of randomness sources in ring oscillator-based true random number generators in FPGAs.
Proceedings of the 13th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems, 2010

Secure protocols for serverless remote product authentication.
Proceedings of the 5th Workshop on Embedded Systems Security, 2010

2009
Observing the Randomness in RO-Based TRNG.
Proceedings of the ReConFig'09: 2009 International Conference on Reconfigurable Computing and FPGAs, 2009

Efficient AES S-boxes implementation for non-volatile FPGAs.
Proceedings of the 19th International Conference on Field Programmable Logic and Applications, 2009

2008
Enhancing security of ring oscillator-based trng implemented in FPGA.
Proceedings of the FPL 2008, 2008

Modeling and observing the jitter in ring oscillators implemented in FPGAs.
Proceedings of the 11th IEEE Workshop on Design & Diagnostics of Electronic Circuits & Systems (DDECS 2008), 2008

Adaptive FPGA NoC-based Architecture for Multispectral Image Correlation.
Proceedings of the 4th European Conference on Colour in Graphics, 2008

2006
Flexible security and its technology limits.
Proceedings of the 2nd International Workshop on Reconfigurable Communication-centric Systems-on-Chip, 2006

Model of a true random number generator aimed at cryptographic applications.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

2005
InvMixColumn decomposition and multilevel resource sharing in AES implementations.
IEEE Trans. VLSI Syst., 2005

Cost-Effective Video Filtering Solution for Real-Time Vision Systems.
EURASIP J. Adv. Sig. Proc., 2005

Hardware Factorization Based on Elliptic Curve Method.
Proceedings of the 13th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2005), 2005

2004
Adaptive video filtering framework.
Int. J. Imaging Systems and Technology, 2004

A Simple PLL-Based True Random Number Generator for Embedded Digital Systems.
Computers and Artificial Intelligence, 2004

High Performance True Random Number Generator in Altera Stratix FPLDs.
Proceedings of the Field Programmable Logic and Application, 2004

Implementation of a 3-D Switching Median Filtering Scheme with an Adaptive LUM-Based Noise Detector.
Proceedings of the Field Programmable Logic and Application, 2004

2003
Hardware-Software Codesign in Embedded Asymmetric Cryptographiy Application - A Case Study.
Proceedings of the Field Programmable Logic and Application, 13th International Conference, 2003

2002
Implementation of 3-D Adaptive LUM Smoother in Reconfigurable Hardware.
Proceedings of the Field-Programmable Logic and Applications, 2002

True Random Number Generator Embedded in Reconfigurable Hardware.
Proceedings of the Cryptographic Hardware and Embedded Systems, 2002

2001
Two Methods of Rijndael Implementation in Reconfigurable Hardware.
Proceedings of the Cryptographic Hardware and Embedded Systems, 2001


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