Martino Ruggiero

According to our database1, Martino Ruggiero authored at least 45 papers between 2005 and 2015.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Other 

Links

On csauthors.net:

Bibliography

2015
Power-Thermal Modeling and Control of Energy-Efficient Servers and Datacenters.
Proceedings of the Handbook on Data Centers, 2015

GPU Acceleration for Simulating Massively Parallel Many-Core Platforms.
IEEE Trans. Parallel Distrib. Syst., 2015

3D CV Descriptor on Parallel Heterogeneous Platforms.
ACM Trans. Embedded Comput. Syst., 2015

2014
Low Power and Scalable Many-Core Architecture for Big-Data Stream Computing.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2014

2013
SIMinG-1k: A thousand-core simulator running on general-purpose graphical processing units.
Concurrency and Computation: Practice and Experience, 2013

VirtualSoC: A Full-System Simulation Environment for Massively Parallel Heterogeneous System-on-Chip.
Proceedings of the 2013 IEEE International Symposium on Parallel & Distributed Processing, 2013

Correlation-aware virtual machine allocation for energy-efficient datacenters.
Proceedings of the Design, Automation and Test in Europe, 2013

GPU-SHOT: Parallel Optimization for Real-Time 3D Local Description.
Proceedings of the IEEE Conference on Computer Vision and Pattern Recognition, 2013

2012
Neural Network-Based Thermal Simulation of Integrated Circuits on GPUs.
IEEE Trans. on CAD of Integrated Circuits and Systems, 2012

Fast and scalable temperature-driven floorplan design in 3D MPSoCs.
Proceedings of the 13th Latin American Test Workshop, 2012

Free cooling-aware dynamic power management for green datacenters.
Proceedings of the 2012 International Conference on High Performance Computing & Simulation, 2012

Accelerating thermal simulations of 3D ICs with liquid cooling using neural networks.
Proceedings of the Great Lakes Symposium on VLSI 2012, 2012

Multi-core architecture design for ultra-low-power wearable health monitoring systems.
Proceedings of the 2012 Design, Automation & Test in Europe Conference & Exhibition, 2012

Full system simulation of many-core heterogeneous SoCs using GPU and QEMU semihosting.
Proceedings of the 5th Annual Workshop on General Purpose Processing with Graphics Processing Units, 2012

2011
Parallel Rendering and Animation of Subdivision Surfaces on the Cell BE Processor.
International Journal of Parallel Programming, 2011

Optimal resource allocation and scheduling for the CELL BE platform.
Annals OR, 2011

Exploring instruction caching strategies for tightly-coupled shared-memory clusters.
Proceedings of the 2011 International Symposium on System on Chip, 2011

Fast thermal simulation of 2D/3D integrated circuits exploiting neural networks and GPUs.
Proceedings of the 2011 International Symposium on Low Power Electronics and Design, 2011

PRO3D, Programming for Future 3D Manycore Architectures: Project's Interim Status.
Proceedings of the Formal Methods for Components and Objects, 10th International Symposium, 2011

MPOpt-Cell: a high-performance data-flow programming environment for the CELL BE processor.
Proceedings of the 8th Conference on Computing Frontiers, 2011

GPGPU-Accelerated Parallel and Fast Simulation of Thousand-Core Platforms.
Proceedings of the 11th IEEE/ACM International Symposium on Cluster, 2011

2010
Stochastic allocation and scheduling for conditional task graphs in multi-processor systems-on-chip.
J. Scheduling, 2010

Scalable instruction set simulator for thousand-core architectures running on GPGPUs.
Proceedings of the 2010 International Conference on High Performance Computing & Simulation, 2010

Adaptive TDMA bus allocation and elastic scheduling: A unified approach for enhancing robustness in multi-core RT systems.
Proceedings of the 28th International Conference on Computer Design, 2010

3D-ICE: Fast compact transient thermal modeling for 3D ICs with inter-tier liquid cooling.
Proceedings of the 2010 International Conference on Computer-Aided Design, 2010

Performance and energy trade-offs analysis of L2 on-chip cache architectures for embedded MPSoCs.
Proceedings of the 20th ACM Great Lakes Symposium on VLSI 2009, 2010

Efficient OpenMP data mapping for multicore platforms with vertically stacked memory.
Proceedings of the Design, Automation and Test in Europe, 2010

Parallel subdivision surface rendering and animation on the Cell BE processor.
Proceedings of the Design, Automation and Test in Europe, 2010

2009
Reducing the Abstraction and Optimality Gaps in the Allocation and Scheduling for Variable Voltage/Frequency MPSoC Platforms.
IEEE Trans. on CAD of Integrated Circuits and Systems, 2009

HVS-DBS: human visual system-aware dynamic luminance backlight scaling for video streaming applications.
Proceedings of the 9th ACM & IEEE International conference on Embedded software, 2009

Visual quality analysis for dynamic backlight scaling in LCD systems.
Proceedings of the Design, Automation and Test in Europe, 2009

2008
Tecniche per il controllo dinamico del consumo di potenza per piattaforme system-on-chip.
PhD thesis, 2008

A Fast and Accurate Technique for Mapping Parallel Applications on Stream-Oriented MPSoC Platforms with Communication Awareness.
International Journal of Parallel Programming, 2008

Exploring architectural solutions for energy optimisations in bus-based system-on-chip.
IET Computers & Digital Techniques, 2008

DBS4video: dynamic luminance backlight scaling based on multi-histogram frame characterization for video streaming application.
Proceedings of the 8th ACM & IEEE International conference on Embedded software, 2008

Cellflow: A Parallel Application Development Environment with Run-Time Support for the Cell BE Processor.
Proceedings of the 11th Euromicro Conference on Digital System Design: Architectures, 2008

Multi-stage Benders Decomposition for Optimizing Multicore Architectures.
Proceedings of the Integration of AI and OR Techniques in Constraint Programming for Combinatorial Optimization Problems, 2008

A Constraint Programming Approach for Allocation and Scheduling on the CELL Broadband Engine.
Proceedings of the Principles and Practice of Constraint Programming, 2008

2007
A lightweight parallel java execution environment for embedded multiprocessor systems-on-chip.
Proceedings of the 17th ACM Great Lakes Symposium on VLSI 2007, 2007

MP-Queue: an Efficient Communication Library for Embedded Streaming Multimedia Platforms.
Proceedings of the 2007 5th Workshop on Embedded Systems for Real-Time Multimedia, 2007

Communication-aware stochastic allocation and scheduling framework for conditional task graphs in multi-processor systems-on-chip.
Proceedings of the 7th ACM & IEEE International conference on Embedded software, 2007

Interactive presentation: Capturing the interaction of the communication, memory and I/O subsystems in memory-centric industrial MPSoC platforms.
Proceedings of the 2007 Design, Automation and Test in Europe Conference and Exposition, 2007

2006
Communication-aware allocation and scheduling framework for stream-oriented multi-processor systems-on-chip.
Proceedings of the Conference on Design, Automation and Test in Europe, 2006

2005
Simultaneous memory and bus partitioning for SoC architectures.
Proceedings of the Proceedings 2005 IEEE International SOC Conference, 2005

Application-Specific Power-Aware Workload Allocation for Voltage Scalable MPSoC Platforms.
Proceedings of the 23rd International Conference on Computer Design (ICCD 2005), 2005


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