Carlos H. Diaz

According to our database, Carlos H. Diaz authored at least 10 papers between 2001 and 2021.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2021

Challenges toward Low-Power SOT-MRAM.

Shy-Jay Lin, Yen-Lin Huang, MingYaun Song, Chien-Ming Lee, Fen Xue, Guan-Long Chen, Shan-Yi Yang, Yao-Jen Chang, I-Jung Wang, Yu-Chen Hsin, Yi-Hui Su, Jeng-Hua Wei, Chi-Feng Pai, Shan X. Wang, Carlos H. Diaz

Proceedings of the IEEE International Reliability Physics Symposium, 2021

Composition Segregation of Ge-Rich GST and Its Effect on Reliability.

Yung-Huei Lee, P. J. Liao, Vincent Hou, Dawei Heh, Chih-Hung Nien, Wen-Hsien Kuo, Gary T. Chen, Shao-Ming Yu, Yu-Sheng Chen, Jau-Yi Wu, Xinyu Bao, Carlos H. Diaz

Proceedings of the IEEE International Reliability Physics Symposium, 2021

2011

28nm metal-gate high-K CMOS SoC technology for high-performance mobile applications.

S. H. Yang, J. Y. Sheu, M. K. Ieong, M. H. Chiang, T. Yamamoto, J. J. Liaw, S. S. Chang, Y. M. Lin, T. L. Hsu, J. R. Hwang, J. K. Ting, C. H. Wu, K. C. Ting, F. C. Yang, C. M. Liu, I. L. Wu, Y. M. Chen, S. J. Chent, K. S. Chen, J. Y. Cheng, M. H. Tsai, W. Chang, R. Chen, C. C. Chen, T. L. Lee, C. K. Lin, S. C. Yang, Y. M. Sheu, J. T. Tzeng, L. C. Lu, S. M. Jang, Carlos H. Diaz, Yuh-Jier Mii

Proceedings of the 2011 IEEE Custom Integrated Circuits Conference, 2011

2005

Device trends and implications on circuit design in advanced CMOS technologies.

Carlos H. Diaz, K. H. Fung, Ying-Keung Leung, Chung-Cheng Wu, Chih-Ping Chao, G. J. Chern, Wesley L. Lin, Chien-Ming Lee, Fang-Shi Lai, Mi-Chang Chang, Yuan-Chen Sun

Proceedings of the IEEE 2005 Custom Integrated Circuits Conference, 2005

2003

Process and circuit design interlock for application-dependent scaling tradeoffs and optimization in the SoC era.

Carlos H. Diaz, Mi-Chang Chang, Tong-Chern Ong, Jack Yuan-Chen Sun

IEEE J. Solid State Circuits, 2003

Foundry technology for 130nm and beyond SoC.

Denny D. Tang, Carlos H. Diaz, Chih-Ping Chao, Humning Hsu, Chwan-Ying Lee, Chih-Sheng Chang, Yu-Tai Chia, Ming-Ta Yang, Jack Yuan-Chen Sun

Proceedings of the IEEE Custom Integrated Circuits Conference, 2003

A scaleable model for STI mechanical stress effect on layout dependence of MOS electrical characteristics.

Ke-Wei Su, Yi-Ming Sheu, Chung-Kai Lin, Sheng-Jier Yang, Wen-Jya Liang, Xuemei Xi, Chung-Shi Chiang, Jaw-Kang Her, Yu-Tai Chia, Carlos H. Diaz, Chenming Hu

Proceedings of the IEEE Custom Integrated Circuits Conference, 2003

2002

Correction to "exploiting CMOS reverse interconnect scaling in multigigahertz amplifier and oscillator design".

Bendik Kleveland, Carlos H. Diaz, Dieter Vook, Liam Madden, Thomas H. Lee, S. Simon Wong

IEEE J. Solid State Circuits, 2002

Application-dependent scaling tradeoffs and optimization in the SoC era.

Carlos H. Diaz, Mi-Chang Chang, Tong-Chern Ong, Jack Yuan-Chen Sun

Proceedings of the IEEE 2002 Custom Integrated Circuits Conference, 2002

2001

Exploiting CMOS reverse interconnect scaling in multigigahertz amplifier and oscillator design.

Bendik Kleveland, Carlos H. Diaz, Dieter Vook, Liam Madden, Thomas H. Lee, S. Simon Wong

IEEE J. Solid State Circuits, 2001