Liam Madden

Orcid: 0000-0002-2814-276X

According to our database1, Liam Madden authored at least 18 papers between 1992 and 2023.

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Bibliography

2023
Memory capacity of two layer neural networks with smooth activations.
CoRR, 2023

2022
Sketching the Best Approximate Quantum Compiling Problem.
Proceedings of the IEEE International Conference on Quantum Computing and Engineering, 2022

Online Stochastic Gradient Methods Under Sub-Weibull Noise and the Polyak-Łojasiewicz Condition.
Proceedings of the 61st IEEE Conference on Decision and Control, 2022

2021
Bounds for the Tracking Error of First-Order Online Optimization Methods.
J. Optim. Theory Appl., 2021

Convergence of the Inexact Online Gradient and Proximal-Gradient Under the Polyak-Łojasiewicz Condition.
CoRR, 2021

A Stochastic Operator Framework for Inexact Static and Online Optimization.
CoRR, 2021

2020
Optimization and Learning With Information Streams: Time-varying algorithms and applications.
IEEE Signal Process. Mag., 2020

2019
Online Sparse Subspace Clustering.
Proceedings of the IEEE Data Science Workshop, 2019

2017
A programmable RFSoC in 16nm FinFET technology for wideband communications.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2017

2015
A Heterogeneous 3D-IC Consisting of Two 28 nm FPGA Die and 32 Reconfigurable High-Performance Data Converters.
IEEE J. Solid State Circuits, 2015

2014
6.3 A Heterogeneous 3D-IC consisting of two 28nm FPGA die and 32 reconfigurable high-performance data converters.
Proceedings of the 2014 IEEE International Conference on Solid-State Circuits Conference, 2014

2013
Heterogeneous 3-d stacking, can we have the best of both (technology) worlds?
Proceedings of the International Symposium on Physical Design, 2013

2012
Advancing high performance heterogeneous integration through die stacking.
Proceedings of the 38th European Solid-State Circuit conference, 2012

2002
High-frequency characterization of on-chip digital interconnects.
IEEE J. Solid State Circuits, 2002

Correction to "exploiting CMOS reverse interconnect scaling in multigigahertz amplifier and oscillator design".
IEEE J. Solid State Circuits, 2002

2001
Exploiting CMOS reverse interconnect scaling in multigigahertz amplifier and oscillator design.
IEEE J. Solid State Circuits, 2001

1996
A 160-MHz, 32-b, 0.5-W CMOS RISC microprocessor.
IEEE J. Solid State Circuits, 1996

1992
A 200-MHz 64-bit Dual-Issue CMOS Microprocessor.
Digit. Tech. J., 1992


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