Cécile Braunstein

According to our database1, Cécile Braunstein authored at least 9 papers between 2004 and 2014.

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Bibliography

2014
Complete Model-Based Equivalence Class Testing for the ETCS Ceiling Speed Monitor.
Proceedings of the Formal Methods and Software Engineering, 2014

2012
Efficient Refinement Strategy Exploiting Component Properties in a CEGAR Process.
Proceedings of the Models, Methods, and Tools for Complex Chip Design, 2012

An efficient refinement strategy exploiting component properties in a cegar process.
Proceedings of the Proceeding of the 2012 Forum on Specification and Design Languages, 2012

2011
Feasibility analysis for robustness quantification by symbolic model checking.
Formal Methods Syst. Des., 2011

2009
Complementary Formal Approaches for Dependability Analysis.
Proceedings of the 24th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, 2009

Increasing the accuracy of SAT-based debugging.
Proceedings of the Design, Automation and Test in Europe, 2009

2007
Using CTL formulae as component abstraction in a design and verification flow.
Proceedings of the Seventh International Conference on Application of Concurrency to System Design (ACSD 2007), 2007

2006
Formalizing the Incremental Design and Verification Process of a Pipelined Protocol Converter.
Proceedings of the 17th IEEE International Workshop on Rapid System Prototyping (RSP 2006), 2006

2004
CTL-Property Transformations Along an Incremental Design Process.
Proceedings of the Fouth International Workshop on Automated Verification of Critical Systems, 2004


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