Chao Fang

According to our database, Chao Fang authored at least 25 papers between 2019 and 2025.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2025

GPU-accelerated Conflict-based Search for Multi-agent Embodied Intelligence.

Mingkai Tang, Ren Xin, Chao Fang, Yuanhang Li, Hongji Liu, Jin Wu

Mach. Intell. Res., August, 2025

APT-LLM: Exploiting Arbitrary-Precision Tensor Core Computing for LLM Acceleration.

Shaobo Ma, Chao Fang, Haikuo Shao, Zhongfeng Wang

CoRR, August, 2025

Efficient Precision-Scalable Hardware for Microscaling (MX) Processing in Robotics Learning.

Stef Cuyckens, Xiaoling Yi, Nitish Satya Murthy, Chao Fang, Marian Verhelst

CoRR, May, 2025

Enable Lightweight and Precision-Scalable Posit/IEEE-754 Arithmetic in RISC-V Cores for Transprecision Computing.

Qiong Li, Chao Fang, Longwei Huang, Jun Lin, Zhongfeng Wang

CoRR, May, 2025

FlashForge: Ultra-Efficient Prefix-Aware Attention for LLM Decoding.

Zhibin Wang, Rui Ning, Chao Fang, Zhonghui Zhang, Xi Lin, Shaobo Ma, Mo Zhou, Xue Li, Zhongfeng Wang, Chengying Huan, Rong Gu, Kun Yang, Guihai Chen, Sheng Zhong, Chen Tian

CoRR, May, 2025

SPEED: A Scalable RISC-V Vector Processor Enabling Efficient Multiprecision DNN Inference.

Chuanning Wang, Chao Fang, Xiao Wu, Zhongfeng Wang, Jun Lin

IEEE Trans. Very Large Scale Integr. Syst., January, 2025

Anda: Unlocking Efficient LLM Inference with a Variable-Length Grouped Activation Data Format.

Chao Fang, Man Shi, Robin Geens, Arne Symons, Zhongfeng Wang, Marian Verhelst

Proceedings of the IEEE International Symposium on High Performance Computer Architecture, 2025

Efficient Arbitrary Precision Acceleration for Large Language Models on GPU Tensor Cores.

Shaobo Ma, Chao Fang, Haikuo Shao, Zhongfeng Wang

Proceedings of the 30th Asia and South Pacific Design Automation Conference, 2025

2024

Efficient N:M Sparse DNN Training Using Algorithm, Architecture, and Dataflow Co-Design.

Chao Fang, Wei Sun, Aojun Zhou, Zhongfeng Wang

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., February, 2024

SPEED: A Scalable RISC-V Vector Processor Enabling Efficient Multi-Precision DNN Inference.

Chuanning Wang, Chao Fang, Xiao Wu, Zhongfeng Wang, Jun Lin

CoRR, 2024

Energy Cost Modelling for Optimizing Large Language Model Inference on Hardware Accelerators.

Robin Geens, Man Shi, Arne Symons, Chao Fang, Marian Verhelst

Proceedings of the 37th IEEE International System-on-Chip Conference, 2024

A Scalable RISC-V Vector Processor Enabling Efficient Multi-Precision DNN Inference.

Chuanning Wang, Chao Fang, Xiao Wu, Zhongfeng Wang, Jun Lin

Proceedings of the IEEE International Symposium on Circuits and Systems, 2024

BETA: Binarized Energy-Efficient Transformer Accelerator at the Edge.

Yuhao Ji, Chao Fang, Zhongfeng Wang

Proceedings of the IEEE International Symposium on Circuits and Systems, 2024

Co-Designing Binarized Transformer and Hardware Accelerator for Efficient End-to-End Edge Deployment.

Yuhao Ji, Chao Fang, Shaobo Ma, Haikuo Shao, Zhongfeng Wang

Proceedings of the 43rd IEEE/ACM International Conference on Computer-Aided Design, 2024

A Precision-Scalable RISC-V DNN Processor with On-Device Learning Capability at the Extreme Edge.

Longwei Huang, Chao Fang, Qiong Li, Jun Lin, Zhongfeng Wang

Proceedings of the 29th Asia and South Pacific Design Automation Conference, 2024

2023

Efficient N: M Sparse DNN Training Using Algorithm, Architecture, and Dataflow Co-Design.

Chao Fang, Wei Sun, Aojun Zhou, Zhongfeng Wang

CoRR, 2023

PDPU: An Open-Source Posit Dot-Product Unit for Deep Learning Applications.

Qiong Li, Chao Fang, Zhongfeng Wang

Proceedings of the IEEE International Symposium on Circuits and Systems, 2023

Bebert: Efficient And Robust Binary Ensemble Bert.

Jiayi Tian, Chao Fang, Haonan Wang, Zhongfeng Wang

Proceedings of the IEEE International Conference on Acoustics, 2023

CEST: Computation-Efficient N:M Sparse Training for Deep Neural Networks.

Chao Fang, Wei Sun, Aojun Zhou, Zhongfeng Wang

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023

2022

An Algorithm-Hardware Co-Optimized Framework for Accelerating N: M Sparse Transformers.

Chao Fang, Aojun Zhou, Zhongfeng Wang

IEEE Trans. Very Large Scale Integr. Syst., 2022

An Efficient Hardware Accelerator for Sparse Transformer Neural Networks.

Chao Fang, Shouliang Guo, Wei Wu, Jun Lin, Zhongfeng Wang, Ming Kai Hsu, Lingzhi Liu

Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

2021

Evaluations on Deep Neural Networks Training Using Posit Number System.

Jinming Lu, Chao Fang, Mingyang Xu, Jun Lin, Zhongfeng Wang

IEEE Trans. Computers, 2021

Accelerating 3D Convolutional Neural Networks Using 3D Fast Fourier Transform.

Chao Fang, Liulu He, Haonan Wang, Jinghe Wei, Zhongfeng Wang

Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

2020

A Configurable FPGA Accelerator of Bi-LSTM Inference with Structured Sparsity.

Shouliang Guo, Chao Fang, Jun Lin, Zhongfeng Wang

Proceedings of the 33rd IEEE International System-on-Chip Conference, 2020

2019

Training Deep Neural Networks Using Posit Number System.

Jinming Lu, Siyuan Lu, Zhisheng Wang, Chao Fang, Jun Lin, Zhongfeng Wang, Li Du

Proceedings of the 32nd IEEE International System-on-Chip Conference, 2019