Cheikh Ndiaye

According to our database, Cheikh Ndiaye authored at least 6 papers between 2015 and 2018.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2018

Key parameters driving transistor degradation in advanced strained SiGe channels.

Vincent Huard, Cheikh Ndiaye, M. Arabi, Narendra Parihar, X. Federspiel, Souhir Mhira, S. Mahapatra, Alain Bravaix

Proceedings of the IEEE International Reliability Physics Symposium, 2018

Modeling self-heating effects in advanced CMOS nodes.

M. Arabi, A. Cros, X. Federspiel, Cheikh Ndiaye, Vincent Huard, M. Rafik

Proceedings of the IEEE International Reliability Physics Symposium, 2018

2016

Performance vs. reliability adaptive body bias scheme in 28 nm & 14 nm UTBB FDSOI nodes.

Cheikh Ndiaye, Vincent Huard, X. Federspiel, Florian Cacho, Alain Bravaix

Microelectron. Reliab., 2016

Potentiality of healing techniques in hot-carrier damaged 28 nm FDSOI CMOS nodes.

Alain Bravaix, Florian Cacho, X. Federspiel, Cheikh Ndiaye, Souhir Mhira, Vincent Huard

Microelectron. Reliab., 2016

Hot-carrier and BTI damage distinction for high performance digital application in 28nm FDSOI and 28nm LP CMOS nodes.

Alain Bravaix, M. Saliva, Florian Cacho, X. Federspiel, Cheikh Ndiaye, Souhir Mhira, Edith Kussener, E. Pauly, Vincent Huard

Proceedings of the 22nd IEEE International Symposium on On-Line Testing and Robust System Design, 2016

2015

Impact of gate oxide breakdown in logic gates from 28nm FDSOI CMOS technology.

M. Saliva, Florian Cacho, Cheikh Ndiaye, Vincent Huard, D. Angot, Alain Bravaix, Lorena Anghel

Proceedings of the IEEE International Reliability Physics Symposium, 2015