Ching-Chi Chang

According to our database1, Ching-Chi Chang authored at least 5 papers between 2001 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2024
Arvon: A Heterogeneous System-in-Package Integrating FPGA and DSP Chiplets for Versatile Workload Acceleration.
IEEE J. Solid State Circuits, April, 2024

2023
Arvon: A Heterogeneous SiP Integrating a 14nm FPGA and Two 22nm 1.8TFLOPS/W DSPs with 1.7Tbps/mm<sup>2</sup> AIB 2.0 Interface to Provide Versatile Workload Acceleration.
Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023

2005
Digital VLSI OFDM transceiver architecture for wireless SoC design.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

High speed pilot-less sampling frequency acquisition for DMT systems.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

2001
A wide pull-in range fast acquisition hardware-sharing two-fold carrier recovery loop.
Proceedings of the 2001 International Symposium on Circuits and Systems, 2001


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