Chorng-Kuang Wang

According to our database1, Chorng-Kuang Wang authored at least 29 papers between 1999 and 2014.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Awards

IEEE Fellow

IEEE Fellow 2008, "For contributions to communications circuit design and for leadership in promoting the profession".

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Other 

Links

On csauthors.net:

Bibliography

2014
A 1V 10-bit 500KS/s energy-efficient SAR ADC using Master-Slave DAC technique in 180nm CMOS.
Proceedings of the Technical Papers of 2014 International Symposium on VLSI Design, 2014

2013
A CMOS Cantilever-Based Label-Free DNA SoC With Improved Sensitivity for Hepatitis B Virus Detection.
IEEE Trans. Biomed. Circuits and Systems, 2013

2012
A fully integrated hepatitis B virus DNA detection SoC based on monolithic polysilicon nanowire CMOS process.
Proceedings of the Symposium on VLSI Circuits, 2012

A 4.9-mW 4-Gb/s single-to-differential TIA with current-amplifying regulated cascode.
Proceedings of Technical Program of 2012 VLSI Design, Automation and Test, 2012

I/Q imbalance compensation and channel equalization algorithm for MISO-OFDM systems.
Proceedings of the 12th International Conference on ITS Telecommunications, 2012

A 1V 19.3dBm 79GHz power amplifier in 65nm CMOS.
Proceedings of the 2012 IEEE International Solid-State Circuits Conference, 2012

2011
A 90 nm CMOS V-Band Low-Noise Active Balun With Broadband Phase-Correction Technique.
J. Solid-State Circuits, 2011

An 85-GHz injection-locked frequency divider with current-reuse pre-amplifier technique.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2011

A low power W-band PLL with 17-mW in 65-nm CMOS technology.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2011

2010
Joint Carrier Synchronization and Equalization Algorithm for Packet-Based OFDM Systems Over the Multipath Fading Channel.
IEEE Trans. Vehicular Technology, 2010

A low power high reliability dual-path noise-cancelling LNA for WSN applications.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2010

A 77 GHz power amplifier using transformer-based power combiner in 90 nm CMOS.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2010

Design and analysis of cost-efficient IFFT/FFT processor chip for wireless OFDM systems.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2010

2009
A 60-GHz Phased Array Receiver Front-End in 0.13-mu hboxm CMOS Technology.
IEEE Trans. on Circuits and Systems, 2009

Joint Carrier Synchronization and Equalizaiton Algorithm for OFDM Systems - Loop-Delay Analysis and Complexity Consideration.
Proceedings of the 70th IEEE Vehicular Technology Conference, 2009

Joint Carrier Synchronization and Equalization Algorithm for OFDM Systems - Closed-Loop Derivation.
Proceedings of the 69th IEEE Vehicular Technology Conference, 2009

Cost-Effective Equalization for STBC MIMO/MISO OFDM Systems over Multipath Fading Channel.
Proceedings of the 70th IEEE Vehicular Technology Conference, 2009

A MIMO-OFDM digital baseband receiver design with adaptive equalization technique for IEEE 802.16 WMAN.
Proceedings of the IEEE International Conference on Acoustics, 2009

2008
Joint Carrier Synchronization and Equalization for OFDM Systems Over Multipath Fading Channel.
Proceedings of the 68th IEEE Vehicular Technology Conference, 2008

A low power 20 GHz 1.5 Gb/s CMOS injection-pulling FSK modulator and frequency discriminator for 60GHz links.
Proceedings of the IEEE 2008 Custom Integrated Circuits Conference, 2008

A 0.13μm CMOS fully differential receiver with on-chip baluns for 60GHz broadband wireless communications.
Proceedings of the IEEE 2008 Custom Integrated Circuits Conference, 2008

2005
A multi-band multi-standard RF front-end IEEE 802.16a for IEEE 802.16a and IEEE 802.11 a/b/g applications.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

Digital VLSI OFDM transceiver architecture for wireless SoC design.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

A 15 mW 69 dB 2 Gsamples/s CMOS analog front-end for low-band UWB applications.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

High speed pilot-less sampling frequency acquisition for DMT systems.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

DHT-based frequency-domain equalizer for DMT systems.
Proceedings of the 13th European Signal Processing Conference, 2005

2004
A 10 Gbase-LX4 receiver front end transimpedance amplifier and limiting amplifier.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004

2001
A wide pull-in range fast acquisition hardware-sharing two-fold carrier recovery loop.
Proceedings of the 2001 International Symposium on Circuits and Systems, 2001

1999
PLL Circuits.
Proceedings of the VLSI Handbook., 1999


  Loading...