Christian Heidorn

Orcid: 0009-0002-7557-0350

According to our database1, Christian Heidorn authored at least 17 papers between 2017 and 2026.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book  In proceedings  Article  PhD thesis  Dataset  Other 

Links

On csauthors.net:

Bibliography

2026
Dynamically Adaptable Ensemble Proxies for Training-Free Neural Architecture Search.
Proceedings of the Sixth European Workshop on Machine Learning and Systems, EuroMLSys 2026, 2026

Entropy Sampling-Based Neural Architecture Search for Resource-Constrained Microcontroller Targets.
Proceedings of the Design, Automation & Test in Europe Conference, 2026

2025
Evaluation of CGRA Toolchains.
CoRR, February, 2025

Mapping and Execution of Nested Loops on Processor Arrays: CGRAs vs. TCPAs.
CoRR, February, 2025

2024
Hardware-Aware Evolutionary Explainable Filter Pruning for Convolutional Neural Networks.
Int. J. Parallel Program., April, 2024

OpTC - A Toolchain for Deployment of Neural Networks on AURIX TC3xx Microcontrollers.
CoRR, 2024

Efficient Deployment of Neural Networks for Thermal Monitoring on AURIX TC3xx Microcontrollers.
Proceedings of the 10th International Conference on Vehicle Technology and Intelligent Transport Systems, 2024

ALPACA: An Accelerator Chip for Nested Loop Programs.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2024

2022
Hardware-Aware Evolutionary Filter Pruning.
Proceedings of the Embedded Computer Systems: Architectures, Modeling, and Simulation, 2022

2021
Aarith: an arbitrary precision number library.
Proceedings of the SAC '21: The 36th ACM/SIGAPP Symposium on Applied Computing, 2021

Design Space Exploration of Time, Energy, and Error Rate Trade-offs for CNNs Using Accuracy-Programmable Instruction Set Processors.
Proceedings of the Machine Learning and Principles and Practice of Knowledge Discovery in Databases, 2021

Hand Sign Recognition via Deep Learning on Tightly Coupled Processor Arrays.
Proceedings of the 31st International Conference on Field-Programmable Logic and Applications, 2021

2020
Hardware Implementation of Hyperbolic Tangent Activation Function for Floating Point Formats.
Proceedings of the 2020 24th International Symposium on VLSI Design and Test (VDAT), 2020

Design space exploration for layer-parallel execution of convolutional neural networks on CGRAs.
Proceedings of the SCOPES '20: 23rd International Workshop on Software and Compilers for Embedded Systems, 2020

2019
Compilation of Dataflow Applications for Multi-Cores using Adaptive Multi-Objective Optimization.
ACM Trans. Design Autom. Electr. Syst., 2019

Efficient Mapping of CNNs onto Tightly Coupled Processor Arrays.
J. Comput., 2019

2017
Seminar Innovation Management - Winter Term 2017.
CoRR, 2017


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