Clement Jany

Orcid: 0000-0003-4863-6684

According to our database1, Clement Jany authored at least 9 papers between 2014 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Links

On csauthors.net:

Bibliography

2023
SamurAI: A Versatile IoT Node With Event-Driven Wake-Up and Embedded ML Acceleration.
IEEE J. Solid State Circuits, 2023

2021
A High-Order-N Frequency-Multiplier Using Pulsed Oscillator: Modeling and Optimization.
Proceedings of the 19th IEEE International New Circuits and Systems Conference, 2021

2020
SamurAI: A 1.7MOPS-36GOPS Adaptive Versatile IoT Node with 15, 000× Peak-to-Idle Power Reduction, 207ns Wake-Up Time and 1.3TOPS/W ML Efficiency.
Proceedings of the IEEE Symposium on VLSI Circuits, 2020

2018
Low Power Locking Detector for Frequency Calibration of Multi-Frequency Injection Locked Oscillators.
Proceedings of the 14th Conference on Ph.D. Research in Microelectronics and Electronics, 2018

Benefits of Joint Optimization of Tunable Wake-up Radio Architecture and Protocols.
Proceedings of the 25th IEEE International Conference on Electronics, Circuits and Systems, 2018

2015
A Programmable Frequency Multiplier-by-29 Architecture for Millimeter Wave Applications.
IEEE J. Solid State Circuits, 2015

A 45GHz/55GHz LO frequency selector for E-band transceivers based on switchable injection locked-oscillators in BiCMOS 55nm.
Proceedings of the ESSCIRC Conference 2015, 2015

2014
A novel approximated solution for the Van der Pol oscillator. Application to pulsed oscillations modeling in switched cross-coupled MOS oscillators.
Proceedings of the IEEE 57th International Midwest Symposium on Circuits and Systems, 2014

A novel ultra-low phase noise, programmable frequency multiplier-by-30 architecture. Application to 60-GHz frequency generation.
Proceedings of the ESSCIRC 2014, 2014


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