Reena Panda

According to our database1, Reena Panda authored at least 20 papers between 2012 and 2019.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2019
SelSMaP: A Selective Stride Masking Prefetching Scheme.
ACM Trans. Archit. Code Optim., 2019

2018
HALO: A Hierarchical Memory Access Locality Modeling Technique For Memory System Explorations.
Proceedings of the 32nd International Conference on Supercomputing, 2018

Wait of a Decade: Did SPEC CPU 2017 Broaden the Performance Horizon?
Proceedings of the IEEE International Symposium on High Performance Computer Architecture, 2018

CAMP: Accurate modeling of core and memory locality for proxy generation of big-data applications.
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018

BUQS: Battery- and user-aware QoS scaling for interactive mobile devices.
Proceedings of the 23rd Asia and South Pacific Design Automation Conference, 2018

2017
Prefetching for cloud workloads: An analysis based on address patterns.
Proceedings of the 2017 IEEE International Symposium on Performance Analysis of Systems and Software, 2017

Accurate address streams for LLC and beyond (SLAB): A methodology to enable system exploration.
Proceedings of the 2017 IEEE International Symposium on Performance Analysis of Systems and Software, 2017

Statistical Pattern Based Modeling of GPU Memory Access Streams.
Proceedings of the 54th Annual Design Automation Conference, 2017

Proxy Benchmarks for Emerging Big-Data Workloads.
Proceedings of the 26th International Conference on Parallel Architectures and Compilation Techniques, 2017

2016
Genesys: Automatically generating representative training sets for predictive benchmarking.
Proceedings of the International Conference on Embedded Computer Systems: Architectures, 2016

Prefetching Techniques for Near-memory Throughput Processors.
Proceedings of the 2016 International Conference on Supercomputing, 2016

Proxy-Guided Load Balancing of Graph Processing Workloads on Heterogeneous Clusters.
Proceedings of the 45th International Conference on Parallel Processing, 2016

POSTER: SILC-FM: Subblocked InterLeaved Cache-Like Flat Memory Organization.
Proceedings of the 2016 International Conference on Parallel Architectures and Compilation, 2016

2015
Data partitioning strategies for graph workloads on heterogeneous clusters.
Proceedings of the International Conference for High Performance Computing, 2015

Performance Characterization of Modern Databases on Out-of-Order CPUs.
Proceedings of the 27th International Symposium on Computer Architecture and High Performance Computing, 2015

Watt Watcher: Fine-Grained Power Estimation for Emerging Workloads.
Proceedings of the 27th International Symposium on Computer Architecture and High Performance Computing, 2015

GPGPU Benchmark Suites: How Well Do They Sample the Performance Spectrum?
Proceedings of the 44th International Conference on Parallel Processing, 2015

2014
B-Fetch: Branch Prediction Directed Prefetching for Chip-Multiprocessors.
Proceedings of the 47th Annual IEEE/ACM International Symposium on Microarchitecture, 2014

Data analytics workloads: Characterization and similarity analysis.
Proceedings of the IEEE 33rd International Performance Computing and Communications Conference, 2014

2012
B-Fetch: Branch Prediction Directed Prefetching for In-Order Processors.
IEEE Comput. Archit. Lett., 2012


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