Matthew Horsnell

According to our database, Matthew Horsnell authored at least 12 papers between 2007 and 2023.

Collaborative distances:

• Dijkstra number of three.
• Erdős number of three.

2023

Do Video Encoding Workloads Stress the Microarchitecture?

Steffen Jensen, Jaekyu Lee, Dam Sunwoo, Matt Horsnell, Matthew Siggs, Jeeho Ryoo, Lizy K. John

Proceedings of the IEEE International Symposium on Workload Characterization, 2023

2022

Microarchitectural Performance Evaluation of AV1 Video Encoding Workloads.

Steffen Jensen, Jaekyu Lee, Dam Sunwoo, Matthew J. Horsnell, Lizy K. John

Proceedings of the International IEEE Symposium on Performance Analysis of Systems and Software, 2022

2020

The gem5 Simulator: Version 20.0+.

Jason Lowe-Power, Abdul Mutaal Ahmad, Ayaz Akram, Mohammad Alian, Rico Amslinger, Matteo Andreozzi, Adrià Armejach, Nils Asmussen, Srikant Bharadwaj, Gabe Black, Gedare Bloom, Bobby R. Bruce, Daniel Rodrigues Carvalho, Jerónimo Castrillón, Lizhong Chen, Nicolas Derumigny, Stephan Diestelhorst, Wendy Elsasser, Marjan Fariborz, Amin Farmahini Farahani, Pouya Fotouhi, Ryan Gambord, Jayneel Gandhi, Dibakar Gope, Thomas Grass, Bagus Hanindhito, Andreas Hansson, Swapnil Haria, Austin Harris, Timothy Hayes, Adrian Herrera, Matthew Horsnell, Syed Ali Raza Jafri, Radhika Jagtap, Hanhwi Jang, Reiley Jeyapaul, Timothy M. Jones, Matthias Jung, Subash Kannoth, Hamidreza Khaleghzadeh, Yuetsu Kodama, Tushar Krishna, Tommaso Marinelli, Christian Menard, Andrea Mondelli, Tiago Mück, Omar Naji, Krishnendra Nathella, Hoa Nguyen, Nikos Nikoleris, Lena E. Olson, Marc S. Orr, Binh Pham, Pablo Prieto, Trivikram Reddy, Alec Roelke, Mahyar Samani, Andreas Sandberg, Javier Setoain, Boris Shingarov, Matthew D. Sinclair, Tuan Ta, Rahul Thakur, Giacomo Travaglini, Michael Upton, Nilay Vaish, Ilias Vougioukas, Zhengrong Wang, Norbert Wehn, Christian Weis, David A. Wood, Hongil Yoon, Éder F. Zulian

CoRR, 2020

2017

The ARM Scalable Vector Extension.

Nigel Stephens, Stuart Biles, Matthias Boettcher, Jacob Eapen, Mbou Eyole, Giacomo Gabrielli, Matt Horsnell, Grigorios Magklis, Alejandro Martinez, Nathanaël Prémillieu, Alastair Reid, Alejandro Rico, Paul Walker

IEEE Micro, 2017

2015

Evaluation of Hybrid Run-Time Power Models for the ARM Big.LITTLE Architecture.

Krastin Nikov, José L. Núñez-Yáñez, Matthew Horsnell

Proceedings of the 13th IEEE International Conference on Embedded and Ubiquitous Computing, 2015

2010

Scalable Object-Aware Hardware Transactional Memory.

Behram Khan, Matthew Horsnell, Mikel Luján, Ian Watson

Proceedings of the Euro-Par 2010 - Parallel Processing, 16th International Euro-Par Conference, Ischia, Italy, August 31, 2010

2009

Exploiting object structure in hardware transactional memory.

Behram Khan, Matthew Horsnell, Ian Rogers, Mikel Luján, Andrew Dinn, Ian Watson

Comput. Syst. Sci. Eng., 2009

2008

A first insight into object-aware hardware transactional memory.

Behram Khan, Matthew Horsnell, Ian Rogers, Mikel Luján, Andrew Dinn, Ian Watson

Proceedings of the SPAA 2008: Proceedings of the 20th Annual ACM Symposium on Parallelism in Algorithms and Architectures, 2008

An adaptive bloom filter cache partitioning scheme for multicore architectures.

Konstantinos Nikas, Matthew Horsnell, Jim D. Garside

Proceedings of the 2008 International Conference on Embedded Computer Systems: Architectures, 2008

Adaptive Loop Tiling for a Multi-cluster CMP.

Jisheng Zhao, Matthew Horsnell, Mikel Luján, Ian Rogers, Chris C. Kirkham, Ian Watson

Proceedings of the Algorithms and Architectures for Parallel Processing, 2008

An Object-Aware Hardware Transactional Memory System.

Behram Khan, Matthew Horsnell, Ian Rogers, Mikel Luján, Andrew Dinn, Ian Watson

Proceedings of the 10th IEEE International Conference on High Performance Computing and Communications, 2008

2007

Optimizing Chip Multiprocessor Work Distribution Using Dynamic Compilation.

Jisheng Zhao, Matthew Horsnell, Ian Rogers, Andrew Dinn, Chris C. Kirkham, Ian Watson

Proceedings of the Euro-Par 2007, 2007