David Li

Affiliations:
  • Qualcomm, Inc., San Diego, CA, USA
  • University of Waterloo, Department of Electrical and Computer Engineering, ON, Canada (PhD 2011)


According to our database1, David Li authored at least 9 papers between 2009 and 2013.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2013
Constant Delay Logic Style.
IEEE Trans. Very Large Scale Integr. Syst., 2013

2012
Performance, Metastability, and Soft-Error Robustness Trade-offs for Flip-Flops in 40 nm CMOS.
IEEE Trans. Circuits Syst. I Regul. Pap., 2012

A Low-Power High-Performance Single-Cycle Tree-Based 64-Bit Binary Comparator.
IEEE Trans. Circuits Syst. II Express Briefs, 2012

A 148ps 135mW 64-bit adder with Constant-Delay logic in 65nm CMOS.
Proceedings of the IEEE 2012 Custom Integrated Circuits Conference, 2012

2011
Design and analysis of metastable-hardened and soft-error tolerant high-performance, low-power flip-flops.
Proceedings of the 12th International Symposium on Quality Electronic Design, 2011

Design and analysis of metastable-hardened flip-flops in sub-threshold region.
Proceedings of the 2011 International Symposium on Low Power Electronics and Design, 2011

Performance, metastability and soft-error robustness tradeoffs for flip-flops in 40nm CMOS.
Proceedings of the 2011 IEEE Custom Integrated Circuits Conference, 2011

2010
Comparative analysis and study of metastability on high-performance flip-flops.
Proceedings of the 11th International Symposium on Quality of Electronic Design (ISQED 2010), 2010

2009
Design of a 64-bit Low-energy High-performance Adder using Dynamic Feedthrough Logic.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009


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