Dingcheng Jiang

Orcid: 0009-0004-4379-694X

According to our database1, Dingcheng Jiang authored at least 3 papers between 2024 and 2025.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2025
Cramming a Data Center into One Cabinet, a Co-Exploration of Computing and Hardware Architecture of Waferscale Chip.
Proceedings of the 52nd Annual International Symposium on Computer Architecture, 2025

2024
Tackling the Dynamicity in a Production LLM Serving System with SOTA Optimizations via Hybrid Prefill/Decode/Verify Scheduling on Efficient Meta-kernels.
CoRR, 2024

Live Demonstration: A Reconfigurable, Energy-efficient and High-frame-rate EKF-SLAM Accelerator Based SoC Design for Autonomous Mobile Robot Applications.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2024


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