Dominik Auras

According to our database1, Dominik Auras authored at least 21 papers between 2009 and 2019.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Links

On csauthors.net:

Bibliography

2019
VLSI Architectures for ORVD Trellis based MIMO Detection.
Proceedings of the International Conference on Computing, Networking and Communications, 2019

2018
VLSI implementation of channel estimation for millimeter wave beamforming training.
Proceedings of the 9th IEEE Latin American Symposium on Circuits & Systems, 2018

Reducing the Computational Complexity of ORVD-Trellis Search Based MIMO Detection.
Proceedings of the 2018 International Conference on Computing, 2018

2016
ORVD-Trellis based MIMO detection.
Proceedings of the 14th IEEE International New Circuits and Systems Conference, 2016

A flexible MCMC detector ASIC.
Proceedings of the International SoC Design Conference, 2016

2014
A Parallel MCMC-Based MIMO Detector: VLSI Design and Algorithm.
Proceedings of the VLSI-SoC: Internet of Things Foundations, 2014

VLSI design of a parallel MCMC-based MIMO detector with multiplier-free Gibbs samplers.
Proceedings of the 22nd International Conference on Very Large Scale Integration, 2014

A Novel Class of Linear MIMO Detectors with Boosted Communications Performance: Algorithm and VLSI Architecture.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2014

Efficient VLSI architectures for matrix inversion in soft-input soft-output MMSE MIMO detectors.
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014

A novel reduced-complexity soft-input soft-output MMSE MIMO detector: Algorithm and efficient VLSI architecture.
Proceedings of the IEEE International Conference on Communications, 2014

VLSI implementation of linear MIMO detection with boosted communications performance: extended abstract.
Proceedings of the Great Lakes Symposium on VLSI 2014, GLSVLSI '14, Houston, TX, USA - May 21, 2014

2013
A Flexible ASIC for Time-Domain Decision-Directed Channel Estimation in MIMO-OFDM Systems.
Proceedings of the VLSI-SoC: At the Crossroads of Emerging Trends, 2013

A parallel VLSI architecture for Markov chain Monte Carlo based MIMO detection.
Proceedings of the Great Lakes Symposium on VLSI 2013 (part of ECRC), 2013

Creation of ESL power models for communication architectures using automatic calibration.
Proceedings of the 50th Annual Design Automation Conference 2013, 2013

2012
A multimode decision-directed channel estimation ASIC for MIMO-OFDM.
Proceedings of the 20th IEEE/IFIP International Conference on VLSI and System-on-Chip, 2012

An FPGA-accelerated testbed for hardware component development in MIMO wireless communication systems.
Proceedings of the 2012 International Conference on Embedded Computer Systems: Architectures, 2012

Just-in-Time Verification in ADL-based processor design.
Proceedings of the 2012 International Conference on Embedded Computer Systems: Architectures, 2012

Architectures for MIMO-OFDM simplified decision directed channel estimation.
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

2010
CMA: Chip multi-accelerator.
Proceedings of the IEEE 8th Symposium on Application Specific Processors, 2010

2009
Designing an ASIP for Cryptographic Pairings over Barreto-Naehrig Curves.
IACR Cryptol. ePrint Arch., 2009

Designing an ASIP for Cryptographic Pairings over Barreto-Naehrig Curves.
Proceedings of the Cryptographic Hardware and Embedded Systems, 2009


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