Euripides Sotiriades

According to our database1, Euripides Sotiriades authored at least 29 papers between 1998 and 2021.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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On csauthors.net:

Bibliography

2021
An FPGA-Based System for Video Processing to Detect Holes in Aquaculture Nets.
Proceedings of the 21st IEEE International Conference on Bioinformatics and Bioengineering, 2021

2020
Exploring Modern FPGA Platforms for Faster Phylogeny Reconstruction with RAxML.
Proceedings of the 20th IEEE International Conference on Bioinformatics and Bioengineering, 2020

2017
Deploying FPGAs to future-proof genome-wide analyses based on linkage disequilibrium.
Proceedings of the 27th International Conference on Field Programmable Logic and Applications, 2017

An Architecture for the Acceleration of a Hybrid Leaky Integrate and Fire SNN on the Convey HC-2ex FPGA-Based Processor.
Proceedings of the 25th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2017

2016
Leveraging Reconfigurable Computing in Distributed Real-time Computation Systems.
Proceedings of the Workshops of the EDBT/ICDT 2016 Joint Conference, 2016

2014
Reconfiguring the Bioinformatics Computational Spectrum: Challenges and Opportunities of FPGA-Based Bioinformatics Acceleration Platforms.
IEEE Des. Test, 2014

2012
ROTA: An Archipelago-Wide Area Network for High Speed Communication to Ships.
Proceedings of the 16th Panhellenic Conference on Informatics, PCI 2012, 2012

Opportunities from the use of FPGAs as platforms for bioinformatics algorithms.
Proceedings of the 12th IEEE International Conference on Bioinformatics & Bioengineering, 2012

2011
Reconfigurable architecture structures for the BLAST DNA sequencing algorithm
PhD thesis, 2011

Parallel accelerators for GlimmerHMM bioinformatics algorithm.
Proceedings of the Design, Automation and Test in Europe, 2011

Reconfigurable Computing IP Cores for Multiple Sequence Alignment.
Proceedings of the BIOINFORMATICS 2011, 2011

2010
GE3: A single FPGA client-server architecture for Golomb Ruler derivation.
Proceedings of the International Conference on Field-Programmable Technology, 2010

Reconfigurable Systems for the Zuker and Predator Algorithms for Secondary Structure Prediction of Genetic Data.
Proceedings of the International Conference on Field Programmable Logic and Applications, 2010

2009
Exploring FPGAs for accelerating the phylogenetic likelihood function.
Proceedings of the 23rd IEEE International Symposium on Parallel and Distributed Processing, 2009

A FPGA based coprocessor for gene finding using Interpolated Markov Model (IMM).
Proceedings of the 19th International Conference on Field Programmable Logic and Applications, 2009

A reconfigurable architecture for the Phylogenetic Likelihood Function.
Proceedings of the 19th International Conference on Field Programmable Logic and Applications, 2009

Design and implementation of a database filter for BLAST acceleration.
Proceedings of the Design, Automation and Test in Europe, 2009

2008
A rate-based prefiltering approach to blast acceleration.
Proceedings of the FPL 2008, 2008

2007
A General Reconfigurable Architecture for the BLAST Algorithm.
J. VLSI Signal Process., 2007

Design Space Exploration for the BLAST Algorithm Implementation.
Proceedings of the IEEE Symposium on Field-Programmable Custom Computing Machines, 2007

2006
Rapid Phototyping of a System-on-a-Chip for the BLAST Algorithm Implementation.
Proceedings of the 17th IEEE International Workshop on Rapid System Prototyping (RSP 2006), 2006

Some initial results on hardware BLAST acceleration with a reconfigurable architecture.
Proceedings of the 20th International Parallel and Distributed Processing Symposium (IPDPS 2006), 2006

FPGA based architecture for DNA sequence comparison and database search.
Proceedings of the 20th International Parallel and Distributed Processing Symposium (IPDPS 2006), 2006

2004
A Case Study on Rapid Prototyping of Hardware Systems: The Effect of CAD Tool Capabilities, Design Flows, and Design Styles.
Proceedings of the 15th IEEE International Workshop on Rapid System Prototyping (RSP 2004), 2004

2001
Rapid Prototyping of a Reusable 4x4 Active ATM Switch Core with the PCI Pamette.
Proceedings of the 12th IEEE International Workshop on Rapid System Prototyping (RSP 2001), 2001

Architecture and Application of PLATO, A Reconfigurable Active Network Platform.
Proceedings of the 9th Annual IEEE Symposium on Field-Programmable Custom Computing Machines, 2001

2000
Hardware-Software Codesign and Parallel Implementation of a Golomb Ruler Derivation Engine.
Proceedings of the 8th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2000), 2000

1998
General Purpose vs. Custom FCCM's: a Comparison of Splash2, Quickturn RPM, and GE1 for Golomb Ruler Derivation.
Proceedings of the 6th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM '98), 1998

Architecture and Design of GE1, a FCCM for Golomb Ruler Derivation.
Proceedings of the 6th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM '98), 1998


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