Fatemeh Eslami

According to our database1, Fatemeh Eslami authored at least 11 papers between 2009 and 2018.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Other 

Links

On csauthors.net:

Bibliography

2018
Rapid Triggering Capability Using an Adaptive Overlay during FPGA Debug.
ACM Trans. Design Autom. Electr. Syst., 2018

Extending post-silicon coverage measurement using time-multiplexed FPGA overlays.
Proceedings of the 23rd IEEE European Test Symposium, 2018

2016
An Improved Overlay and Mapping Algorithm Supporting Rapid Triggering for FPGA Debug.
SIGARCH Computer Architecture News, 2016

Enabling Effective FPGA Debug using Overlays: Opportunities and Challenges.
CoRR, 2016

2015
An adaptive virtual overlay for fast trigger insertion for FPGA debug.
Proceedings of the 2015 International Conference on Field Programmable Technology, 2015

2014
Incremental distributed trigger insertion for efficient FPGA debug.
Proceedings of the 24th International Conference on Field Programmable Logic and Applications, 2014

2013
Application Specific Low Leakage data Cache for embedded processors.
Proceedings of the International Green Computing Conference, 2013

Escaping the Academic Sandbox: Realizing VPR Circuits on Xilinx Devices.
Proceedings of the 21st IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2013

2011
Capacitive Boosting for FPGA Interconnection Networks.
Proceedings of the International Conference on Field Programmable Logic and Applications, 2011

2009
A New Cell Design Methodology for Balanced XOR-XNOR Circuits for Hybrid-CMOS Logic.
J. Low Power Electronics, 2009

Application Specific Transistor Sizing for Low Power Full Adders.
Proceedings of the 20th IEEE International Conference on Application-Specific Systems, 2009


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