Tooraj Nikoubin

According to our database, Tooraj Nikoubin authored at least 29 papers between 2009 and 2026.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2026

When Models Ignore Definitions: Measuring Semantic Override Hallucinations in LLM Reasoning.

Yogeswar Reddy Thota, Setareh Rafatirad, Houman Homayoun, Tooraj Nikoubin

CoRR, February, 2026

Human-AI Interaction: Evaluating LLM Reasoning on Digital Logic Circuit included Graph Problems, in terms of creativity in design and analysis.

Yogeswar Reddy Thota, Setareh Rafatirad, Houman Homayoun, Tooraj Nikoubin

CoRR, February, 2026

Agentic Hardware Synthesis with CDM Supergatesfor Efficient Design Generation.

Srija Vuppala, Yogeswar Reddy Thota, Mahathi Ellanti, Harshith Navin Lachappa, Avesta Sasan, Tooraj Nikoubin

Proceedings of the Great Lakes Symposium on VLSI 2026, 2026

PRISM: Pruning via Rectified-gradient Importance and Saliency Mapping - making models sparse for execution on edge.

Zuxiong Tan, Ali Karkehabadi, Houman Homayoun, Tooraj Nikoubin, Avesta Sasan

Proceedings of the Great Lakes Symposium on VLSI 2026, 2026

SuperGate-Net: CDM-Based MAC for Scalable Neural Inference via Cross-Layer Analysis.

Harshith Navin Lachappa, Yogeswar Reddy Thota, Mahathi Ellanti, Srija Vuppala, Tooraj Nikoubin

Proceedings of the Great Lakes Symposium on VLSI 2026, 2026

CLS-LCR: Classification Subspace Learning with Learnable Categorical Regularization in Forward Forward Networks.

Ali Karkehabadi, Zuxiong Tan, Tooraj Nikoubin, Houman Homayoun, Avesta Sasan

Proceedings of the Great Lakes Symposium on VLSI 2026, 2026

2025

Enhancing Drone-Based Precision Agriculture: Performance Optimization of TinyML Models on Edge Devices and Adaptive Path Planning.

Yagna S. H. Annadata, Aiswariya Thazhathethil, Vishnuvaradhan Moganarengam, Tooraj Nikoubin

SN Comput. Sci., 2025

TinyML Based Biometric Authentication Using PPG Signals for Edge Devices.

Yogeswar Reddy Thota, Jeffrey Scott Nixon, Bhavya Chandran, Tooraj Nikoubin

Proceedings of the Great Lakes Symposium on VLSI 2025, GLSVLSI 2025, New Orleans, LA, USA, 30 June 2025, 2025

TinyML Enabled Real-Time Bearing Fault Classification in Motors Using Vibration Signals.

Yogeswar Reddy Thota, Mojtaba Afshar, Samantha Boden, Brendan Dunlap, Bilal Akin, Tooraj Nikoubin

Proceedings of the Great Lakes Symposium on VLSI 2025, GLSVLSI 2025, New Orleans, LA, USA, 30 June 2025, 2025

TinyML Based Stress Detection utilizing PPG Signals: A Lightweight Approach for Smart Wearable Devices.

Priyanka Ganesan, Yogeswar Reddy Thota, Hashem Shehata, Tooraj Nikoubin

Proceedings of the Great Lakes Symposium on VLSI 2025, GLSVLSI 2025, New Orleans, LA, USA, 30 June 2025, 2025

2024

Hardware Acceleration of Molecular Property Graph Prediction on a Heterogeneous Edge Platform.

Mahdieh Grailoo, Tooraj Nikoubin, José L. Núñez-Yáñez

Proceedings of the 2024 IEEE Nordic Circuits and Systems Conference (NorCAS), 2024

TinyML for ECG Biometrics on Resource Constrained Devices.

Yogeswar Reddy Thota, Tooraj Nikoubin

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2024

Area-power and Energy Efficient Substitution box (S-box) in Advanced Encryption Standard (AES).

Omid Bazgir, Satwik Gali, Tooraj Nikoubin

Proceedings of the Great Lakes Symposium on VLSI 2024, 2024

2019

Hybrid Logical Effort for Hybrid Logic Style Full Adders in Multistage Structures.

Hareesh-Reddy Basireddy, Karthikeya Challa, Tooraj Nikoubin

IEEE Trans. Very Large Scale Integr. Syst., 2019

Fast, Area & Energy Efficient Supergate Design With Multi-Output & Multi-Functional CDM Cells.

Tooraj Nikoubin, Hareesh-Reddy Basireddy

IEEE Access, 2019

Rounding Technique Analysis for Power-Area & Energy Efficient Approximate Multiplier Design.

Priyanka Lohray, Satwik Gali, Srirathan Rangisetti, Tooraj Nikoubin

Proceedings of the IEEE 9th Annual Computing and Communication Workshop and Conference, 2019

Fast & Energy Efficient Binary to BCD Converter with Complement Based Logic Design (CBLD) for BCD Multipliers.

Ashish Joshi, Srirathan Rangisetti, Priyanka Lohray, Tooraj Nikoubin

Proceedings of the IEEE 9th Annual Computing and Communication Workshop and Conference, 2019

2016

Energy and Area Efficient Three-Input XOR/XNORs With Systematic Cell Design Methodology.

Tooraj Nikoubin, Mahdieh Grailoo, Changzhi Li

IEEE Trans. Very Large Scale Integr. Syst., 2016

Complement Based Logic Design (CBLD) for Area and Power Efficiency of Arithmetic Building Blocks.

Nikhil Patil, Teja Geddamuri, Tooraj Nikoubin

Proceedings of the 7th International Conference on Computing Communication and Networking Technologies, 2016

Wearable System for Obstacle Detection and Human Assistance Using Ultrasonic Sensor Array.

Ashish Patankar, Tooraj Nikoubin

Proceedings of the 7th International Conference on Computing Communication and Networking Technologies, 2016

High Speed, Area and Power Efficient 32-bit Vedic Multipliers.

Mounika Mulkalapally, Jacob Manning, Paul Gatewood, Tooraj Nikoubin

Proceedings of the 7th International Conference on Computing Communication and Networking Technologies, 2016

Power and Energy Efficient Standard Cell Library Design in CDM Logic Style with FinFET Transistors.

Ashish Joshi, Thejaswani Putta, Tooraj Nikoubin

Proceedings of the 7th International Conference on Computing Communication and Networking Technologies, 2016

Power and Energy Efficient Standard Cells with CDM Logic Style for Optimization of Multiplier Structures.

Mahdieh Grailoo, Ashish Joshi, Mounika Mulkalapally, Tooraj Nikoubin

Proceedings of the 7th International Conference on Computing Communication and Networking Technologies, 2016

2015

Structural health monitoring of wind turbines using a low-cost portable k-band radar: An ab-initio field investigation.

Tooraj Nikoubin, José Maria Muñoz-Ferreras, Roberto Gómez-García, Daan Liang, Changzhi Li

Proceedings of the IEEE Topical Conference on Wireless Sensors and Sensor Networks, 2015

2014

Wireless radar devices for smart human-computer interaction.

Yiran Li, Changzhan Gu, Tooraj Nikoubin, Changzhi Li

Proceedings of the IEEE 57th International Midwest Symposium on Circuits and Systems, 2014

2013

Differential Cascode Voltage Switch (DCVS) Strategies by CNTFET Technology for Standard Ternary Logic.

Reza Faghih Mirzaee, Tooraj Nikoubin, Keivan Navi, Omid Hashemipour

Microelectron. J., 2013

2010

Simple Exact Algorithm for Transistor Sizing of Low-Power High-Speed Arithmetic Circuits.

Tooraj Nikoubin, Poona Bahrebar, Sara Pouri, Keivan Navi, Vaez Iravani

VLSI Design, 2010

Cell Design Methodology Based on Transmission Gate for Low-Power High-Speed Balanced XOR-XNOR Circuits in Hybrid-CMOS Logic Style.

Tooraj Nikoubin, Mahdieh Grailoo, Sayyed Hasan Mozafari

J. Low Power Electron., 2010

2009

A New Cell Design Methodology for Balanced XOR-XNOR Circuits for Hybrid-CMOS Logic.

Tooraj Nikoubin, Fatemeh Eslami, Amirali Baniasadi, Keivan Navi

J. Low Power Electron., 2009