Mihai Sima

Orcid: 0000-0002-1945-5190

According to our database1, Mihai Sima authored at least 47 papers between 1999 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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On csauthors.net:

Bibliography

2023
Leveraging Public Information to Fit a Compact Hot Carrier Injection Model to a Target Technology.
IEEE Access, 2023

Decoding of Polar Codes with Finite Memory.
Proceedings of the IEEE International Black Sea Conference on Communications and Networking, 2023

2022
Fixed-Point Arithmetic for Implementing Massive MIMO Systems.
Proceedings of the 24th International Conference on Advanced Communication Technology, 2022

2021
Hardware Trojan with Frequency Modulation.
Proceedings of the 12th IEEE Latin America Symposium on Circuits and System, 2021

Massive MIMO in Fixed-Point Arithmetic.
Proceedings of the 23rd International Conference on Advanced Communication Technology, 2021

2020
Iterative Channel Estimation for Large Scale MIMO with Highly Quantized Measurements in 5G.
Proceedings of the 28th European Signal Processing Conference, 2020

2018
Novel MOSFET Operation for Detection of Recycled Integrated Circuits.
Proceedings of the IEEE 61st International Midwest Symposium on Circuits and Systems, 2018

Behavioral Implementation of SVD on FPGA.
Proceedings of the 2018 IEEE International Symposium on Signal Processing and Information Technology (ISSPIT), 2018

2017
Whitenoise encryption implementation with increased robustness to side-channel attacks.
Proceedings of the 2017 IEEE SmartWorld, 2017

Secured-by-Design FPGA against Early Evaluation.
Proceedings of the 2017 IEEE Computer Society Annual Symposium on VLSI, 2017

2016
Look-Up tables with multiple inputs for secured-by-design FPGAs.
Proceedings of the IEEE 59th International Midwest Symposium on Circuits and Systems, 2016

Faster-than-Nyquist Single-Carrier MIMO Signaling.
Proceedings of the 2016 IEEE Globecom Workshops, Washington, DC, USA, December 4-8, 2016, 2016

2015
Guest Editorial: Special Issue on Embedded Computer Systems: Architectures, Modeling and Simulation.
Int. J. Parallel Program., 2015

Secured-by-design FPGA: look-up tables and switch-boxes.
Proceedings of the Nordic Circuits and Systems Conference, 2015

2013
Instruction Set Extensions for Matrix Decompositions on Software Defined Radio Architectures.
J. Signal Process. Syst., 2013

2012
Zero phase smoothing of radio channel estimates.
Proceedings of the 20th European Signal Processing Conference, 2012

2011
Fixed-Point CORDIC-Based QR Decomposition by Givens Rotations on FPGA.
Proceedings of the 2011 International Conference on Reconfigurable Computing and FPGAs, 2011

Capacitive Boosting for FPGA Interconnection Networks.
Proceedings of the International Conference on Field Programmable Logic and Applications, 2011

Exploration of sign precomputation-based CORDIC in reconfigurable systems.
Proceedings of the Conference Record of the Forty Fifth Asilomar Conference on Signals, 2011

2010
CORDIC-based LMMSE equalizer for Software Defined Radio.
Proceedings of the 2010 International Conference on Embedded Computer Systems: Architectures, 2010

Discrete Time Faster-Than-Nyquist Signalling.
Proceedings of the Global Communications Conference, 2010

Fine-grained vs. coarse-grained shift-and-add arithmetic in FPGAs (abstract only).
Proceedings of the ACM/SIGDA 18th International Symposium on Field Programmable Gate Arrays, 2010

2009
Parallel detection of MC-CDMA in fast fading.
IEEE Trans. Wirel. Commun., 2009

Software-Defined Radio and Broadcasting.
Int. J. Digit. Multim. Broadcast., 2009

2008
VLSI implementation of a shift-enabled reconfigurable array.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

Implementing communications systems on an SDR SoC.
Proceedings of the IEEE International Conference on Acoustics, 2008

Reconfigurable solutions for very-long arithmetic with applications in cryptography.
Proceedings of the 18th ACM Great Lakes Symposium on VLSI 2008, 2008

Reconfigurable array for transcendental functions calculation.
Proceedings of the 2008 International Conference on Field-Programmable Technology, 2008

VLSI Implementation of a Cryptography-Oriented Reconfigurable Array.
Proceedings of the 11th Euromicro Conference on Digital System Design: Architectures, 2008

Transcedental functions on a shift-enabled reconfigurable device: CORDIC as a case-study.
Proceedings of the 42nd Asilomar Conference on Signals, Systems and Computers, 2008

2007
Software Solutions for Converting a MIMO-OFDM Channel into Multiple SISO-OFDM Channels.
Proceedings of the Third IEEE International Conference on Wireless and Mobile Computing, 2007

Embedded Reconfigurable Solution for OFDM Detection Over Fast Fading Radio Channels.
Proceedings of the IEEE Workshop on Signal Processing Systems, 2007

Block-Wise Parallel Detection for OFDM with Fast Fading.
Proceedings of the 15th International Conference on Digital Signal Processing, 2007

Alternatives in Designing Level-Restoring Buffers for Interconnection Networks in Field-Programmable Gate Arrays.
Proceedings of the Tenth Euromicro Conference on Digital System Design: Architectures, 2007

2006
Reconfigurable Implementation of Wavelet Transform on an Fpga-Augmented NIOS Processor.
Proceedings of the Canadian Conference on Electrical and Computer Engineering, 2006

Reconfigurable RSA Cryptography for Embedded Devices.
Proceedings of the Canadian Conference on Electrical and Computer Engineering, 2006

2005
IEEE-Compliant IDCT on FPGA-Augmented TriMedia.
J. VLSI Signal Process., 2005

CORDIC-Augmented Sandbridge Processor for Channel Equalization.
Proceedings of the Embedded Computer Systems: Architectures, 2005

2004
Pel reconstruction on FPGA-augmented TriMedia.
IEEE Trans. Very Large Scale Integr. Syst., 2004

2003
Color Space Conversion for MPEG decoding on FPGA-augmented TriMedia Processor.
Proceedings of the 14th IEEE International Conference on Application-Specific Systems, 2003

2002
A Reconfigurable Functional Unit for TriMedia/CPU64. A Case Study.
Proceedings of the Embedded Processor Design Challenges: Systems, Architectures, Modeling, and Simulation, 2002

Parallel Multiple-Symbol Variable-Length Decoding.
Proceedings of the 20th International Conference on Computer Design (ICCD 2002), 2002

Field-Programmable Custom Computing Machines - A Taxonomy -.
Proceedings of the Field-Programmable Logic and Applications, 2002

MPEG-Compliant Entropy Decoding on FPGA-Augmented TriMedia/CPU64.
Proceedings of the 10th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2002), 2002

2001
MPEG Macroblock Parsing and Pel Reconstruction On An FPGA-Augmented TriMedia Processor.
Proceedings of the 19th International Conference on Computer Design (ICCD 2001), 2001

An 8x8 IDCT Implementation on an FPGA-Augmented TriMedia.
Proceedings of the 9th Annual IEEE Symposium on Field-Programmable Custom Computing Machines, 2001

1999
A parser-based text preprocessor for romanian language TTS synthesis.
Proceedings of the Sixth European Conference on Speech Communication and Technology, 1999


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