Felipe G. Magalhaes

Orcid: 0000-0002-0766-1421

According to our database1, Felipe G. Magalhaes authored at least 30 papers between 2010 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Bibliography

2024
Deep Learning-Driven Anomaly Detection for Green IoT Edge Networks.
IEEE Trans. Green Commun. Netw., March, 2024

Survey on Activation Functions for Optical Neural Networks.
ACM Comput. Surv., February, 2024

Natural2CTL: A Dataset for Natural Language Requirements and Their CTL Formal Equivalents.
Proceedings of the Requirements Engineering: Foundation for Software Quality, 2024

2023
SerIOS: Enhancing Hardware Security in Integrated Optoelectronic Systems.
CoRR, 2023

Transparent Trace Annotation for Performance Debugging in Microservice-oriented Systems (Work In Progress Paper).
Proceedings of the Companion of the 2023 ACM/SPEC International Conference on Performance Engineering, 2023

Integrated Photonic AI Accelerators Under Hardware Security Attacks: Impacts and Countermeasures.
Proceedings of the 66th IEEE International Midwest Symposium on Circuits and Systems, 2023

Efficient Defense Against Model Stealing Attacks on Convolutional Neural Networks.
Proceedings of the International Conference on Machine Learning and Applications, 2023

2022
Careful What You Wish For: on the Extraction of Adversarially Trained Models.
Proceedings of the 19th Annual International Conference on Privacy, Security & Trust, 2022

Efficient Scheduling, Mapping and Memory Bandwidth Allocation for Safety-Critical Systems.
Proceedings of the 20th IEEE Interregional NEWCAS Conference, 2022

2021
HyCo: A Low-Latency Hybrid Control Plane for Optical Interconnection Networks.
Proceedings of the IEEE International Workshop on Rapid System Prototyping, 2021

Vehicle Detection and Tracking from Surveillance Cameras in Urban Scenes.
Proceedings of the Advances in Visual Computing - 16th International Symposium, 2021

2020
On the benchmarking of partitioned real-time systems.
CoRR, 2020

Simulator-Based Framework towards Improved Cache Predictability for Multi-Core Avionic Systems.
Proceedings of the Spring Simulation Conference, 2020

2019
Cache Locking Content Selection Algorithms for ARINC-653 Compliant RTOS.
ACM Trans. Embed. Comput. Syst., 2019

2018
Silicon Photonic Interconnects: Minimizing the Controller Latency.
Proceedings of the 2018 on Great Lakes Symposium on VLSI, 2018

2017
High-level modelling of optical integrated networks-based systems with the provision of a low latency controller.
PhD thesis, 2017

Co-design of a low-latency centralized controller for silicon photonic multistage MZI-based switches.
Proceedings of the Optical Fiber Communications Conference and Exhibition, 2017

2016
Design and Modelling of a Low-Latency Centralized Controller for Optical Integrated Networks.
IEEE Commun. Lett., 2016

Modelling and simulation of optical integrated networks for early-stage design exploration (WIP).
Proceedings of the Summer Computer Simulation Conference, 2016

Cluster-based architecture relying on Optical Integrated Networks with the provision of a low-latency arbiter.
Proceedings of the 29th Symposium on Integrated Circuits and Systems Design, 2016

Towards a fast centralized controller for integrated silicon photonic multistage MZI-based switches.
Proceedings of the Optical Fiber Communications Conference and Exhibition, 2016

2014
On the design space exploration through the Hellfire Framework.
J. Syst. Archit., 2014

Embedded cluster-based architecture with high level support - presenting the HC-MPSoC.
Proceedings of the 25nd IEEE International Symposium on Rapid System Prototyping, 2014

2013
Communication support at the OS level to enhance design space exploration in multiprocessed embedded systems.
Proceedings of the 28th Annual ACM Symposium on Applied Computing, 2013

BaBaNoC: An asynchronous network-on-chip described in Balsa.
Proceedings of the 24th IEEE International Symposium on Rapid System Prototyping, 2013

Customizable RTOS to support communication infrastructures and to improve design space exploration in MPSoCs.
Proceedings of the 24th IEEE International Symposium on Rapid System Prototyping, 2013

2012
NoC-based platform for embedded software design: An extension of the Hellfire Framework.
Proceedings of the Thirteenth International Symposium on Quality Electronic Design, 2012

Task model suitable for dynamic load balancing of real-time applications in NoC-based MPSoCs.
Proceedings of the 30th International IEEE Conference on Computer Design, 2012

2011
Embedded virtualization for the next generation of cluster-based MPSoCs.
Proceedings of the 22nd IEEE International Symposium on Rapid System Prototyping, 2011

2010
Hellfire: A design framework for critical embedded systems' applications.
Proceedings of the 11th International Symposium on Quality of Electronic Design (ISQED 2010), 2010


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