Matheus Gibiluka

According to our database1, Matheus Gibiluka authored at least 7 papers between 2013 and 2016.

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Bibliography

2016
A standard cell characterization flow for non-standard voltage supplies.
Proceedings of the 29th Symposium on Integrated Circuits and Systems Design, 2016

Design and analysis of the HF-RISC processor targeting voltage scaling applications.
Proceedings of the 29th Symposium on Integrated Circuits and Systems Design, 2016

Analysis and Design of Delay Lines for Dynamic Voltage Scaling Applications.
Proceedings of the 22nd IEEE International Symposium on Asynchronous Circuits and Systems, 2016

2015
BAT-Hermes: A transition-signaling bundled-data NoC router.
Proceedings of the IEEE 6th Latin American Symposium on Circuits & Systems, 2015

A Bundled-Data Asynchronous Circuit Synthesis Flow Using a Commercial EDA Framework.
Proceedings of the 2015 Euromicro Conference on Digital System Design, 2015

Blade - A Timing Violation Resilient Asynchronous Template.
Proceedings of the 21st IEEE International Symposium on Asynchronous Circuits and Systems, 2015

2013
BaBaNoC: An asynchronous network-on-chip described in Balsa.
Proceedings of the 24th IEEE International Symposium on Rapid System Prototyping, 2013


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