Frank P. Burns

Orcid: 0000-0001-6382-3571

According to our database1, Frank P. Burns authored at least 18 papers between 1991 and 2017.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2017
A Structured Visual Approach to GALS Modeling and Verification of Communication Circuits.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2017

2015
GALS synthesis and verification for xMAS models.
Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015

2013
Variability analysis of self-timed SRAM robustness.
Proceedings of the 2013 23rd International Workshop on Power and Timing Modeling, 2013

2012
Mixed Radix Reed-Muller Expansions.
IEEE Trans. Computers, 2012

Design and security evaluation of balanced 1-of-n circuits.
IET Comput. Digit. Tech., 2012

Self-Timed Physically Unclonable Functions.
Proceedings of the 5th International Conference on New Technologies, 2012

VARMA - VARiability modelling and analysis tool.
Proceedings of the IEEE 15th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2012

2011
Security Evaluation of Balanced 1-of- n Circuits.
IEEE Trans. Very Large Scale Integr. Syst., 2011

2009
Efficient advanced encryption standard implementation using lookup and normal basis.
IET Comput. Digit. Tech., 2009

2007
Dynamic global security-aware synthesis using SystemC.
IET Comput. Digit. Tech., 2007

2006
Low-Cost Online Testing of Asynchronous Handshakes.
Proceedings of the 11th European Test Symposium, 2006

2004
A Low and Balanced Power Implementation of the AES Security Mechanism Using Self-Timed Circuits.
Proceedings of the Integrated Circuit and System Design, 2004

An Asynchronous Synthesis Toolset Using Verilog.
Proceedings of the 2004 Design, 2004

2001
Modelling and verification of an atomic action protocol implemented in Ada.
Comput. Syst. Sci. Eng., 2001

2000
WCET Analysis of Superscalar Processors Using Simulation With Coloured Petri Nets.
Real Time Syst., 2000

1998
Analysing Superscalar Processor Architectures with Coloured Petri Nets.
Int. J. Softw. Tools Technol. Transf., 1998

1996
A self-taught computer engineering course.
Proceedings of the ACM SIGCSE 1st Australasian Conference on Computer Science Education, 1996

1991
Correct interactive transformational synthesis of DSP hardware.
Proceedings of the conference on European design automation, 1991


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