Albert Koelmans

According to our database1, Albert Koelmans authored at least 23 papers between 1991 and 2013.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2013
Design-for-adaptivity of microarchitectures.
Proceedings of the 24th International Conference on Application-Specific Systems, 2013

2012
Mixed Radix Reed-Muller Expansions.
IEEE Trans. Computers, 2012

Design and security evaluation of balanced 1-of-n circuits.
IET Comput. Digit. Tech., 2012

2011
Security Evaluation of Balanced 1-of- n Circuits.
IEEE Trans. Very Large Scale Integr. Syst., 2011

A flexible hardware implementation of SHA-1 and SHA-2 Hash Functions.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011

2009
Efficient advanced encryption standard implementation using lookup and normal basis.
IET Comput. Digit. Tech., 2009

2007
Registers for Phase Difference Based Logic.
IEEE Trans. Very Large Scale Integr. Syst., 2007

Dynamic global security-aware synthesis using SystemC.
IET Comput. Digit. Tech., 2007

Asynchronous Functional Coupling for Low Power Sensor Network Processors.
Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, 2007

2004
A Low and Balanced Power Implementation of the AES Security Mechanism Using Self-Timed Circuits.
Proceedings of the Integrated Circuit and System Design, 2004

An Asynchronous Synthesis Toolset Using Verilog.
Proceedings of the 2004 Design, 2004

2001
Modelling and verification of an atomic action protocol implemented in Ada.
Comput. Syst. Sci. Eng., 2001

2000
WCET Analysis of Superscalar Processors Using Simulation With Coloured Petri Nets.
Real Time Syst., 2000

On developing and verifying design abstractions for reliable concurrent programming in Ada.
Proceedings of the 10th International Workshop on Real-Time Ada, 2000

Asynchronous Communication Mechanisms Using Self-Timed Circuits.
Proceedings of the 6th International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC 2000), 2000

1999
Asynchronous microprocessors: From high level model to FPGA implementation.
J. Syst. Archit., 1999

1998
Analysing Superscalar Processor Architectures with Coloured Petri Nets.
Int. J. Softw. Tools Technol. Transf., 1998

1997
Designing an asynchronous processor using Petri nets.
IEEE Micro, 1997

1996
Modelling, analysis and synthesis of asynchronous control circuits using Petri nets.
Integr., 1996

A self-taught computer engineering course.
Proceedings of the ACM SIGCSE 1st Australasian Conference on Computer Science Education, 1996

1995
High-Level Modeling and Design of Asynchronous Interface Logic.
IEEE Des. Test Comput., 1995

1992
Modelling and Verification of Timing Conditions with the Boyer Moore Prover.
Proceedings of the Theorem Provers in Circuit Design, 1992

1991
Correct interactive transformational synthesis of DSP hardware.
Proceedings of the conference on European design automation, 1991


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