Gwanghyeon Baek

According to our database1, Gwanghyeon Baek authored at least 5 papers between 2003 and 2026.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

Book  In proceedings  Article  PhD thesis  Dataset  Other 

Links

On csauthors.net:

Bibliography

2026
0.021-μm<sup>2</sup> High-Density SRAM in Intel 18A RibbonFET Technology With PowerVia Backside Power Delivery.
IEEE J. Solid State Circuits, January, 2026

2025
29.2 A 0.021µm<sup>2</sup> High-Density SRAM in Intel-18A-RibbonFET Technology with PowerVia-Backside Power Delivery.
Proceedings of the IEEE International Solid-State Circuits Conference, 2025

2024
15.2 A 2048x60m4 SRAM Design in Intel 4 with an Around-the-Array Power-Delivery Scheme Using PowerVia.
Proceedings of the IEEE International Solid-State Circuits Conference, 2024

2022
Energy-Efficient High Bandwidth 6T SRAM Design on Intel 4 CMOS Technology.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022

2003
Complementary Self-Biased Scheme for the Robust Design of CMOS/SET Hybrid Multi-Valued Logic.
Proceedings of the 33rd IEEE International Symposium on Multiple-Valued Logic (ISMVL 2003), 2003


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