According to our database1, H. Naganuma authored at least 3 papers between 2010 and 2013.
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Impact of 3-D integration process on memory retention characteristics in thinned DRAM chip for 3-D memory.
Proceedings of the 2013 IEEE International 3D Systems Integration Conference (3DIC), 2013
A very low area ADC for 3-D stacked CMOS image processing system.
Proceedings of the 2011 IEEE International 3D Systems Integration Conference (3DIC), Osaka, Japan, January 31, 2011
A block-parallel signal processing system for CMOS image sensor with three-dimensional structure.
Proceedings of the IEEE International Conference on 3D System Integration, 2010