Tetsu Tanaka
Orcid: 0000-0001-7414-315X
According to our database1,
Tetsu Tanaka
authored at least 58 papers
between 1994 and 2023.
Collaborative distances:
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Bibliography
2023
Development of Trans-nail PPG Controller Using Fingertip Blood Volume Changes to Enable Highly Accurate Motion Prediction.
Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2023
Impact of Super-long-throw PVD on TSV Metallization and Die-to-Wafer 3D Integration Based on Via-last.
Proceedings of the IEEE International 3D Systems Integration Conference, 2023
2022
3D-stacked retinal prosthesis chip with binary image capture and edge detection functions for human visual restoration.
IEICE Electron. Express, 2022
Implementation of Light and Dark Adaptation Function for High QOL 3D-Stacked Artificial Retina Chip.
Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2022
2021
Design and Evaluation of Electronic-Microsaccade with Balanced Stimulation for Artificial Vision System.
Proceedings of the IEEE Biomedical Circuits and Systems Conference, BioCAS 2021, 2021
Integration of Damage-less Probe Cards Using Nano-TSV Technology for Microbumped Wafer Testing.
Proceedings of the IEEE International 3D Systems Integration Conference, 2021
2019
PPG and SpO2 Recording Circuit with Ambient Light Cancellation for Trans-Nail Pulse-Wave Monitoring System.
Proceedings of the 2019 IEEE Biomedical Circuits and Systems Conference, 2019
Characterization of Low-Height Solder Microbump Bonding for Fine-Pitch Inter-Chip Connection in 3DICs.
Proceedings of the 2019 International 3D Systems Integration Conference (3DIC), 2019
Impacts of Deposition Temperature and Annealing Condition on Ozone-Ethylene Radical Generation-TEOS-CVD SiO2 for Low-Temperature TSV Liner Formation.
Proceedings of the 2019 International 3D Systems Integration Conference (3DIC), 2019
Proceedings of the 2019 International 3D Systems Integration Conference (3DIC), 2019
Development of a CDS Circuit for 3-D Stacked Neural Network Chip using CMOS Analog Signal Processing.
Proceedings of the 2019 International 3D Systems Integration Conference (3DIC), 2019
Investigation of the Underfill with Negative-Thermal-Expansion Material to Suppress Mechanical Stress in 3D Integration System.
Proceedings of the 2019 International 3D Systems Integration Conference (3DIC), 2019
2018
Continuous Peripheral Blood Pressure Measurement with ECG and PPG Signals at Fingertips.
Proceedings of the 2018 IEEE Biomedical Circuits and Systems Conference, 2018
2017
Ultrawide range square wave impedance analysis circuit with ultra-slow ring-oscillator using gate-induced drain-leakage current.
Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2017
Experimental evaluation of stimulus current generator with Laplacian edge-enhancement for 3-D stacked retinal prosthesis chip.
Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2017
2016
Oxide-Oxide Thermocompression Direct Bonding Technologies with Capillary Self-Assembly for Multichip-to-Wafer Heterogeneous 3D System Integration.
Micromachines, 2016
Wide-range and precise tissue impedance analysis circuit with ultralow current source using gate-induced drain-leakage current.
Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2016
Improving the integrity of Ti barrier layer in Cu-TSVs through self-formed TiSix for via-last TSV technology.
Proceedings of the 2016 IEEE International 3D Systems Integration Conference, 2016
Drastic reduction of keep-out-zone in 3D-IC by local stress suppression with negative-CTE filler.
Proceedings of the 2016 IEEE International 3D Systems Integration Conference, 2016
Proceedings of the 2016 IEEE International 3D Systems Integration Conference, 2016
2015
Impacts of 3-D integration processes on device reliabilities in thinned DRAM chip for 3-D DRAM.
Proceedings of the IEEE International Reliability Physics Symposium, 2015
Novel local stress evaluation method in 3D IC using DRAM cell array with planar mOS capacitors.
Proceedings of the 2015 International 3D Systems Integration Conference, 2015
Mitigating thermo mechanical stress in high-density 3D-LSI through dielectric liners in Cu- through silicon Via _ µ-RS and µ-XRD study.
Proceedings of the 2015 International 3D Systems Integration Conference, 2015
Proceedings of the 2015 International 3D Systems Integration Conference, 2015
Consideration of microbump layout for reduction of local bending stress due to CTE Mismatch in 3D IC.
Proceedings of the 2015 International 3D Systems Integration Conference, 2015
Transfer and non-transfer stacking technologies based on chip-to-wafer self-asembly for high-throughput and high-precision alignment and microbump bonding.
Proceedings of the 2015 International 3D Systems Integration Conference, 2015
2014
Micro-XRD investigation of fine-pitch Cu-TSV induced thermo-mechanical stress in high-density 3D-LSI.
Proceedings of the 2014 International 3D Systems Integration Conference, 2014
Cu seeding using electroless deposition on Ru liner for high aspect ratio through-Si vias.
Proceedings of the 2014 International 3D Systems Integration Conference, 2014
Proceedings of the 2014 International 3D Systems Integration Conference, 2014
2013
Multiple optical stimulation to neuron using Si opto-neural probe with multiple optical waveguides and metal-cover for optogenetics.
Proceedings of the 35th Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2013
Proceedings of the 2013 IEEE International 3D Systems Integration Conference (3DIC), 2013
Impact of 3-D integration process on memory retention characteristics in thinned DRAM chip for 3-D memory.
Proceedings of the 2013 IEEE International 3D Systems Integration Conference (3DIC), 2013
A block-parallel ADC with digital noise cancelling for 3-D stacked CMOS image sensor.
Proceedings of the 2013 IEEE International 3D Systems Integration Conference (3DIC), 2013
Highly efficient TSV repair technology for resilient 3-D stacked multicore processor system.
Proceedings of the 2013 IEEE International 3D Systems Integration Conference (3DIC), 2013
2012
A 37 × 37 pixels artificial retina chip with edge enhancement function for 3-D stacked fully implantable retinal prosthesis.
Proceedings of the 2012 IEEE Biomedical Circuits and Systems Conference, 2012
2011
Self-Assembly of Chip-Size Components with Cavity Structures: High-Precision Alignment and Direct Bonding without Thermal Compression for Hetero Integration.
Micromachines, 2011
Novel detachable bonding process with wettability control of bonding surface for versatile chip-level 3D integration.
Proceedings of the 2011 IEEE International 3D Systems Integration Conference (3DIC), Osaka, Japan, January 31, 2011
Fabrication tolerance evaluation of high efficient unidirectional optical coupler for though silicon photonic via in optoelectronic 3D-LSI.
Proceedings of the 2011 IEEE International 3D Systems Integration Conference (3DIC), Osaka, Japan, January 31, 2011
Proceedings of the 2011 IEEE International 3D Systems Integration Conference (3DIC), Osaka, Japan, January 31, 2011
Proceedings of the 2011 IEEE International 3D Systems Integration Conference (3DIC), Osaka, Japan, January 31, 2011
High reliable and fine size of 5-μm diameter backside Cu through-silicon Via(TSV) for high reliability and high-end 3-D LSIs.
Proceedings of the 2011 IEEE International 3D Systems Integration Conference (3DIC), Osaka, Japan, January 31, 2011
Proceedings of the 2011 IEEE International 3D Systems Integration Conference (3DIC), Osaka, Japan, January 31, 2011
Proceedings of the 2011 IEEE International 3D Systems Integration Conference (3DIC), Osaka, Japan, January 31, 2011
2010
Three-dimensional integration technology using through-si via based on reconfigured wafer-to-wafer bonding.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2010
Through Silicon photonic via (TSPV) with Si core for low loss and high-speed data transmission in opto-electronic 3-D LSI.
Proceedings of the IEEE International Conference on 3D System Integration, 2010
Proceedings of the IEEE International Conference on 3D System Integration, 2010
A block-parallel signal processing system for CMOS image sensor with three-dimensional structure.
Proceedings of the IEEE International Conference on 3D System Integration, 2010
Evaluation of alignment accuracy on chip-to-wafer self-assembly and mechanism on the direct chip bonding at room temperature.
Proceedings of the IEEE International Conference on 3D System Integration, 2010
2009
Proceedings of the 14th Asia South Pacific Design Automation Conference, 2009
Proceedings of the IEEE International Conference on 3D System Integration, 2009
Proceedings of the IEEE International Conference on 3D System Integration, 2009
Proceedings of the IEEE International Conference on 3D System Integration, 2009
Proceedings of the IEEE International Conference on 3D System Integration, 2009
Development of a new self-assembled die bonder to three-dimensionally stack known good dies in batch.
Proceedings of the IEEE International Conference on 3D System Integration, 2009
Micro-Raman spectroscopy analysis and capacitance - time (C-t) measurement of thinned silicon substrates for 3D integration.
Proceedings of the IEEE International Conference on 3D System Integration, 2009
1996
Measurements of reflection and transmission characteristics of interior structures of office building in the 60 GHz band.
Proceedings of the 7th IEEE International Symposium on Personal, 1996
1994
Proceedings of the 5th IEEE International Symposium on Personal, 1994