Haleh Vahedi

According to our database, Haleh Vahedi authored at least 6 papers between 2005 and 2021.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2021

11.2 A 26.5625-to-106.25Gb/s XSR SerDes with 1.55pJ/b Efficiency in 7nm CMOS.

Ravi Shivnaraine, Marcus van Ierssel, Kamran Farzan, Dominic DiClemente, George Ng, Nanyan Wang, Javid Musayev, Gairik Dutta, Masumi Shibata, Arash Moradi, Haleh Vahedi, Manavi Farzad, Prabhnoor Kainth, Matt Yu, Nhat Nguyen, Jennifer Pham, Angus McLaren

Proceedings of the IEEE International Solid-State Circuits Conference, 2021

2011

The effectiveness of a current flattening circuit as countermeasure against DPA attacks.

Haleh Vahedi, Stefano Gregori, Radu Muresan

Microelectron. J., 2011

2009

On-Chip Power-Efficient Current Flattening Circuit.

Haleh Vahedi, Stefano Gregori, Radu Muresan

J. Circuits Syst. Comput., 2009

2006

On-chip current flattening circuit with dynamic voltage scaling.

Haleh Vahedi, Radu Muresan, Stefano Gregori

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

2005

An integrated current flattening module for embedded cryptosystems.

Xuequn Li, Haleh Vahedi, Radu Muresan, Stefano Gregori

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

Power-smart system-on-chip architecture for embedded cryptosystems.

Radu Muresan, Haleh Vahedi, Y. Zhanrong, Stefano Gregori

Proceedings of the 3rd IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, 2005