Marcus van Ierssel

According to our database1, Marcus van Ierssel authored at least 16 papers between 1993 and 2021.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Other 

Links

On csauthors.net:

Bibliography

2021
ADC-DSP-Based 10-to-112-Gb/s Multi-Standard Receiver in 7-nm FinFET.
IEEE J. Solid State Circuits, 2021

10-to-112-Gb/s DSP-DAC-Based Transmitter in 7-nm FinFET With Flex Clocking Architecture.
IEEE J. Solid State Circuits, 2021

11.2 A 26.5625-to-106.25Gb/s XSR SerDes with 1.55pJ/b Efficiency in 7nm CMOS.
Proceedings of the IEEE International Solid-State Circuits Conference, 2021

2020

6.3 A 10-to-112Gb/s DSP-DAC-Based Transmitter with 1.2Vppd Output Swing in 7nm FinFET.
Proceedings of the 2020 IEEE International Solid- State Circuits Conference, 2020

2018
A 4-Lane 1.25-to-28.05Gb/s multi-standard 6pJ/b 40dB transceiver in 14nm FinFET with independent TX/RX rate support.
Proceedings of the 2018 IEEE International Solid-State Circuits Conference, 2018

2014
Performance of edge tap decision feedback equalization methods for wireline receivers.
Proceedings of the IEEE 12th International New Circuits and Systems Conference, 2014

2011
An 8.4mW/Gb/s 4-lane 48Gb/s multi-standard-compliant transceiver in 40nm digital CMOS technology.
Proceedings of the IEEE International Solid-State Circuits Conference, 2011

2008
Event-Driven Modeling of CDR Jitter Induced by Power-Supply Noise, Finite Decision-Circuit Bandwidth, and Channel ISI.
IEEE Trans. Circuits Syst. I Regul. Pap., 2008

2007
A 3.2 Gb/s CDR Using Semi-Blind Oversampling to Achieve High Jitter Tolerance.
IEEE J. Solid State Circuits, 2007

2006
A 3.2Gb/s Semi-Blind-Oversampling CDR.
Proceedings of the 2006 IEEE International Solid State Circuits Conference, 2006

A 5Gb/s Transmitter with Reflection Cancellation for Backplane Transceivers.
Proceedings of the IEEE 2006 Custom Integrated Circuits Conference, 2006

2004
An adaptive 4-PAM decision-feedback equalizer for chip-to-chip signaling.
Proceedings of the Proceedings 2004 IEEE International SOC Conference, 2004

2003
Signaling capacity of FR4 PCB traces for chip-to-chip communication.
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

1998
The Transmogrifier-2: a 1 million gate rapid-prototyping system.
IEEE Trans. Very Large Scale Integr. Syst., 1998

1993
A Field Programmable Accelerator for Compiled-Code Applications.
Proceedings of the Proceedings 1993 International Conference on Computer Design: VLSI in Computers & Processors, 1993


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