Hongshuai Zhang
Orcid: 0000-0002-4658-9426
According to our database1,
Hongshuai Zhang authored at least 15 papers
between 2018 and 2026.
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Bibliography
2026
A 30kHz-BW 100.6dB-SNDR ΔΣ Modulator with Swapped Sampling-Feedback Operation and Optimized kT/C Noise Cancellation.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2026
A 3.6mW 5MS/s 100dB-SNDR 2-Step SAR ADC with Continuous-Time Second-Stage and Tracking Averaging.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2026
2025
Analyses Concerning the Phase Noise and Nonlinear Behavior of the Charge-Sharing Integrator-Based Hybrid PLL.
IEEE Trans. Circuits Syst. I Regul. Pap., July, 2025
JMH-Prophet: Optimizing Java Microbenchmark Performance Predictions with Multimodal Deep Learning Techniques.
Proceedings of the 25th International Conference on Software Quality, 2025
A 0.4μW/MHz Reference-Replication-Based RC Oscillator with Path-Delay and Comparator-Offset Cancellation Achieving 9.83ppm/°C from -40 to 125°C.
Proceedings of the IEEE International Solid-State Circuits Conference, 2025
2023
A Second-Order NS Pipelined SAR ADC With Quantization-Prediction-Unrolled Gain Error Shaping and Fully Passive Integrator.
IEEE J. Solid State Circuits, December, 2023
Bi-LSTM-Based Dynamic Prediction Model for Pulling Speed of Czochralski Single-Crystal Furnace.
J. Comput. Inf. Sci. Eng., August, 2023
A 25MHz-BW 77.2dB-SNDR 2<sup>nd</sup>-Order Gain-Error-Shaping and NS Pipelined SAR ADC Based on a Quantization-Prediction-Unrolled Scheme.
Proceedings of the IEEE International Solid- State Circuits Conference, 2023
2022
An Inherent Gain Error Tolerance Noise-Shaping SAR-Assisted Pipeline ADC With Code-Counter-Based Offset Calibration.
IEEE J. Solid State Circuits, 2022
2021
27.6 A 25MHz-BW 75dB-SNDR Inherent Gain Error Tolerance Noise-Shaping SAR-Assisted Pipeline ADC with Background Offset Calibration.
Proceedings of the IEEE International Solid-State Circuits Conference, 2021
2019
A 10-Bit 200-kS/s 1.76- $\mu$ W SAR ADC With Hybrid CAP-MOS DAC for Energy-Limited Applications.
IEEE Trans. Circuits Syst. I Regul. Pap., 2019
2018
A 0.6-V 10-bit 200-kS/s SAR ADC With Higher Side-Reset-and-Set Switching Scheme and Hybrid CAP-MOS DAC.
IEEE Trans. Circuits Syst. I Regul. Pap., 2018
IEEE Trans. Circuits Syst. II Express Briefs, 2018
A 10-bit 200-kS/s 1.76-μW SAR ADC with Hybrid CAP-MOS DAC for Energy-Limited Applications.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018