Hyung-Rok Oh

According to our database¹, Hyung-Rok Oh authored at least 6 papers between 2005 and 2008.

Collaborative distances:

Dijkstra number² of five.
Erdős number³ of five.

Timeline

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Article

PhD thesis

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On csauthors.net:

Bibliography

2008

A 90 nm 1.8 V 512 Mb Diode-Switch PRAM With 266 MB/s Read Throughput.

[BibT_eX]

[DOI]

IEEE J. Solid State Circuits, 2008

2007

A 0.1-µm 1.8-V 256-Mb Phase-Change Random Access Memory (PRAM) With 66-MHz Synchronous Burst-Read Operation.

[BibT_eX]

[DOI]

IEEE J. Solid State Circuits, 2007

A 90nm 1.8V 512Mb Diode-Switch PRAM with 266MB/s Read Throughput.

[BibT_eX]

[DOI]

Proceedings of the 2007 IEEE International Solid-State Circuits Conference, 2007

2006

Enhanced write performance of a 64-mb phase-change random access memory.

[BibT_eX]

[DOI]

IEEE J. Solid State Circuits, 2006

A 0.1µm 1.8V 256Mb 66MHz Synchronous Burst PRAM.

[BibT_eX]

[DOI]

Proceedings of the 2006 IEEE International Solid State Circuits Conference, 2006

2005

A 0.18-μm 3.0-V 64-Mb nonvolatile phase-transition random access memory (PRAM).

[BibT_eX]

[DOI]

IEEE J. Solid State Circuits, 2005

Hyung-Rok Oh

Timeline

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Links

On csauthors.net:

Bibliography

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