Gert Jervan

Orcid: 0000-0003-2237-0187

According to our database1, Gert Jervan authored at least 61 papers between 2000 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

Online presence:

On csauthors.net:

Bibliography

2023
Employing channel probing to derive end-of-life service margins for optical spectrum services.
J. Opt. Commun. Netw., July, 2023

An automated method for mining high-quality assertion sets.
Microprocess. Microsystems, March, 2023

Employing Channel Probing to Derive End-of-Life Service Margins for Optical Spectrum Services. To appear in OPTICA Journal of Optical Communications and Networking.
CoRR, 2023

Edge Intelligence Resource Consumption by UAV-based IR Object Detection.
Proceedings of the 2023 Workshop on UAVs in Multimedia: Capturing the World from a New Perspective, 2023

Service Margins for Wide-Band Optical Spectrum Services Implemented in Long-Haul Raman-Enabled Networks.
Proceedings of the Optical Fiber Communications Conference and Exhibition, 2023

Anomalous File System Activity Detection Through Temporal Association Rule Mining.
Proceedings of the 9th International Conference on Information Systems Security and Privacy, 2023

Object Detection for Rescue Operations by High-Altitude Infrared Thermal Imaging Collected by Unmanned Aerial Vehicles.
Proceedings of the Pattern Recognition and Image Analysis - 11th Iberian Conference, 2023

2022
A Novel Physical Fatigue Assessment Method Utilizing Heart Rate Variability and Pulse Arrival Time towards Personalized Feedback with Wearable Sensors.
Sensors, 2022

Characterization of the optical spectrum as a service.
JOCN, 2022

Concatenated GSNR Profiles for End-to-End Performance Estimations in Disaggregated Networks.
Proceedings of the Optical Fiber Communications Conference and Exhibition, 2022

IMMizer: An Innovative Cost-Effective Method for Minimizing Assertion Sets.
Proceedings of the 25th Euromicro Conference on Digital System Design, 2022

2021
QoT assessment of the optical spectrum as a service in disaggregated network scenarios.
JOCN, 2021

Channel Performance Estimations with Extended Channel Probing.
CoRR, 2021

Black-Box Assessment of Optical Spectrum Services.
Proceedings of the Optical Fiber Communications Conference and Exhibition, 2021

A Methodology for Automated Mining of Compact and Accurate Assertion Sets.
Proceedings of the IEEE Nordic Circuits and Systems Conference, NorCAS 2021, Oslo, 2021

2019
CAESAR-MPSoC: Dynamic and Efficient MPSoC Security Zones.
Proceedings of the 2019 IEEE Computer Society Annual Symposium on VLSI, 2019

Dynamic and Distributed Security Management for NoC Based MPSoCs.
Proceedings of the Computational Science - ICCS 2019, 2019

Design and Verification of Secure Cache Wrapper Against Access-Driven Side-Channel Attacks.
Proceedings of the 22nd Euromicro Conference on Digital System Design, 2019

2018
Understanding MPSoCs: exploiting memory microarchitectural vulnerabilities of high performance NoC-based MPSoCs.
Proceedings of the 18th International Conference on Embedded Computer Systems: Architectures, 2018

AWAIT: An Ultra-Lightweight Soft-Error Mitigation Mechanism for Network-on-Chip Links.
Proceedings of the 13th International Symposium on Reconfigurable Communication-centric Systems-on-Chip, 2018

A Hierarchical Approach for Devising Area Efficient Concurrent Online Checkers.
Proceedings of the IEEE International Test Conference in Asia, 2018

Enabling Secure MPSoC Dynamic Operation through Protected Communication.
Proceedings of the 25th IEEE International Conference on Electronics, Circuits and Systems, 2018

2017
Fault-resilient NoC router with transparent resource allocation.
Proceedings of the 12th International Symposium on Reconfigurable Communication-centric Systems-on-Chip, 2017

Augmented Coaching Ecosystem for Non-obtrusive Adaptive Personalized Elderly Care on the basis of Cloud-Fog-Dew computing paradigm.
Proceedings of the 40th International Convention on Information and Communication Technology, 2017

Comprehensive performance and robustness analysis of 2D turn models for network-on-chips.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017

Automated area and coverage optimization of minimal latency checkers.
Proceedings of the 22nd IEEE European Test Symposium, 2017

From online fault detection to fault management in Network-on-Chips: A ground-up approach.
Proceedings of the 20th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2017

2016
Holistic Approach for Fault-Tolerant Network-on-Chip based Many-Core Systems.
CoRR, 2016

SoCDep<sup>2</sup>: A framework for dependable task deployment on many-core systems under mixed-criticality constraints.
Proceedings of the 11th International Symposium on Reconfigurable Communication-centric Systems-on-Chip, 2016

Logic-based implementation of fault-tolerant routing in 3D network-on-chips.
Proceedings of the Tenth IEEE/ACM International Symposium on Networks-on-Chip, 2016

2015
Automated minimization of concurrent online checkers for Network-on-Chips.
Proceedings of the 10th International Symposium on Reconfigurable Communication-centric Systems-on-Chip, 2015

A Framework for Combining Concurrent Checking and On-Line Embedded Test for Low-Latency Fault Detection in NoC Routers.
Proceedings of the 9th International Symposium on Networks-on-Chip, 2015

Smart photoplethysmographic sensor for pulse wave registration at different vascular depths.
Proceedings of the 37th Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2015

A Framework for Comprehensive Automated Evaluation of Concurrent Online Checkers.
Proceedings of the 2015 Euromicro Conference on Digital System Design, 2015

2014
Legislation and policies for disabled students in European Countries.
Proceedings of the 2014 Information Technology Based Higher Education and Training, 2014

Reflections about the integration of global challenges into higher education future programs: Application in the field of ICT security.
Proceedings of the 2014 Information Technology Based Higher Education and Training, 2014

Respiration signal extraction from photoplethysmogram using pulse wave amplitude variation.
Proceedings of the IEEE International Conference on Communications, 2014

SysML in systems engineering course.
Proceedings of the 10th European Workshop on Microelectronics Education (EWME), 2014

Dependable embedded systems: FP7 KhAI-ERA project experience.
Proceedings of the 10th European Workshop on Microelectronics Education (EWME), 2014

Fault-Tolerant Scheduling of Mixed-Critical Applications on Multi-processor Platforms.
Proceedings of the 12th IEEE International Conference on Embedded and Ubiquitous Computing, 2014

2013
Sleep apnea pre-screening on neonates and children with shoe integrated sensors.
Proceedings of the 2013 NORCHIP, Vilnius, Lithuania, November 11-12, 2013, 2013

2012
Design methodology for fault-tolerant heterogeneous MPSoC under real-time constraints.
Proceedings of the 7th International Workshop on Reconfigurable and Communication-Centric Systems-on-Chip (ReCoSoC), 2012

2011
Contention aware scheduling for NoC-based real-time systems.
Proceedings of the 2011 NORCHIP, Lund, Sweden, November 14-15, 2011, 2011

Communication modelling and synthesis for NoC-based systems with real-time constraints.
Proceedings of the 14th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2011

2010
Guest Editorial.
Microprocess. Microsystems, 2010

2009
Scheduling framework for real-time dependable NoC-based systems.
Proceedings of the 2008 IEEE International Symposium on System-on-Chip, 2009

2008
Hybrid BIST optimization using reseeding and test set compaction.
Microprocess. Microsystems, 2008

Hierarchical Calculation of Malicious Faults for Evaluating the Fault-Tolerance.
Proceedings of the 4th IEEE International Symposium on Electronic Design, 2008

2007
Optimization of Memory-Constrained Hybrid BIST for Testing Core-Based Systems.
Proceedings of the IEEE Second International Symposium on Industrial Embedded Systems, 2007

Graduate School in Information and Communication Technologies. Experiences at Tallinn University of Technology.
Proceedings of the IEEE International Conference on Microelectronic Systems Education, 2007

2006
Test Time Minimization for Hybrid BIST of Core-Based Systems.
J. Comput. Sci. Technol., 2006

Work in Progress: FPGA Based Emulation Environment.
Proceedings of the 2nd International Workshop on Reconfigurable Communication-centric Systems-on-Chip, 2006

2005
Hybrid Built-In Self-Test and Test Generation Techniques for Digital Systems.
PhD thesis, 2005

Energy minimization for hybrid BIST in a system-on-chip test environment.
Proceedings of the 10th European Test Symposium, 2005

Power-Constrained Hybrid BIST Test Scheduling in an Abort-on-First-Fail Test Environment.
Proceedings of the Eighth Euromicro Symposium on Digital Systems Design (DSD 2005), 30 August, 2005

2004
Hybrid BIST Test Scheduling Based on Defect Probabilities.
Proceedings of the 13th Asian Test Symposium (ATS 2004), 2004

2003
Hybrid BIST Time Minimization for Core-Based Systems with STUMPS Architecture.
Proceedings of the 18th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2003), 2003

2002
A Hybrid BIST Architecture and Its Optimization for SoC Testing.
Proceedings of the 3rd International Symposium on Quality of Electronic Design, 2002

High-level and hierarchical test sequence generation.
Proceedings of the Seventh IEEE International High-Level Design Validation and Test Workshop 2002, 2002

2001
Fast Test Cost Calculation for Hybrid BIST in Digital Systems.
Proceedings of the Euromicro Symposium on Digital Systems Design 2001 (Euro-DSD 2001), 2001

2000
Test Cost Minimization for Hybrid Bist.
Proceedings of the 15th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2000), 2000


  Loading...