Ioannis Stamoulias

According to our database, Ioannis Stamoulias authored at least 14 papers between 2010 and 2022.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2022

LSTM Acceleration with FPGA and GPU Devices for Edge Computing Applications in B5G MEC.

Dimitrios Danopoulos, Ioannis Stamoulias, George Lentaris, Dimosthenis Masouros, Ioannis Kanaropoulos, Andreas Kosmas Kakolyris, Dimitrios Soudris

Proceedings of the Embedded Computer Systems: Architectures, Modeling, and Simulation, 2022

2021

Development and Testing on the European Space-Grade BRAVE FPGAs: Evaluation of NG-Large Using High-Performance DSP Benchmarks.

Vasileios Leon, Ioannis Stamoulias, George Lentaris, Dimitrios Soudris, David González Arjona, Ruben Domingo, David Merodio Codinachs, Isabelle Conway

IEEE Access, 2021

2020

High-Performance Vision-Based Navigation on SoC FPGA for Spacecraft Proximity Operations.

George Lentaris, Ioannis Stratakos, Ioannis Stamoulias, Dimitrios Soudris, Manolis I. A. Lourakis, Xenophon Zabulis

IEEE Trans. Circuits Syst. Video Technol., 2020

2017

Hardware accelerators for financial applications in HDL and High Level Synthesis.

Ioannis Stamoulias, Christoforos Kachris, Dimitrios Soudris

Proceedings of the 2017 International Conference on Embedded Computer Systems: Architectures, 2017

Project HIPNOS: Case Study of High Performance Avionics for Active Debris Removal in Space.

George Lentaris, Ioannis Stratakos, Ioannis Stamoulias, Konstantinos Maragos, Dimitrios Soudris, Manolis I. A. Lourakis, Xenophon Zabulis, David González Arjona

Proceedings of the 2017 IEEE Computer Society Annual Symposium on VLSI, 2017

High-Performance Hardware Accelerators for Solving Ordinary Differential Equations.

Ioannis Stamoulias, Matthias Möller, Rene Miedema, Christos Strydis, Christoforos Kachris, Dimitrios Soudris

Proceedings of the 8th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies, 2017

VineTalk: Simplifying software access and sharing of FPGAs in datacenters.

Stelios Mavridis, Emmanouil Pavlidakis, Ioannis Stamoulias, Christos Kozanitis, Nikolaos Chrysos, Christoforos Kachris, Dimitrios Soudris, Angelos Bilas

Proceedings of the 27th International Conference on Field Programmable Logic and Applications, 2017

2016

HW/SW Codesign and FPGA Acceleration of Visual Odometry Algorithms for Rover Navigation on Mars.

George Lentaris, Ioannis Stamoulias, Dimitrios Soudris, Manolis I. A. Lourakis

IEEE Trans. Circuits Syst. Video Technol., 2016

2015

FPGA implementation of an MLSE equalizer in 10Gb/s optical links.

Ioannis Stamoulias, Kristina Georgoulakis, S. Blionas, George-Othon Glentis

Proceedings of the 2015 IEEE International Conference on Digital Signal Processing, 2015

SPARTAN/SEXTANT/COMPASS: Advancing Space Rover Vision via Reconfigurable Platforms.

George Lentaris, Ioannis Stamoulias, Dionysios Diamantopoulos, Konstantinos Maragos, Kostas Siozios, Dimitrios Soudris, Marcos Avilés Rodrigálvarez, Manolis I. A. Lourakis, Xenophon Zabulis, Ioannis Kostavelis, Lazaros Nalpantidis, Evangelos Boukas, Antonios Gasteratos

Proceedings of the Applied Reconfigurable Computing - 11th International Symposium, 2015

2014

SPARTAN: Developing a Vision System for Future Autonomous Space Exploration Robots.

Ioannis Kostavelis, Lazaros Nalpantidis, Evangelos Boukas, Marcos Avilés Rodrigálvarez, Ioannis Stamoulias, George Lentaris, Dionysios Diamantopoulos, Kostas Siozios, Dimitrios Soudris, Antonios Gasteratos

J. Field Robotics, 2014

2013

Parallel architectures for the kNN classifier - design of soft IP cores and FPGA implementations.

Ioannis Stamoulias, Elias S. Manolakos

ACM Trans. Embed. Comput. Syst., 2013

2010

IP-cores design for the kNN classifier.

Elias S. Manolakos, Ioannis Stamoulias

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

Flexible IP cores for the k-NN classification problem and their FPGA implementation.

Elias S. Manolakos, Ioannis Stamoulias

Proceedings of the 24th IEEE International Symposium on Parallel and Distributed Processing, 2010