Jalil Kamali

According to our database, Jalil Kamali authored at least 7 papers between 2005 and 2021.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2021

Baud rate pattern-adaptable dual loop clock recovery for high speed serial links.

Gaurav Malhotra, Jalil Kamali, Amir Amirkhany

Proceedings of the 55th Asilomar Conference on Signals, Systems, and Computers, 2021

2019

Symbol spaced clock recovery for high speed links.

Gaurav Malhotra, Jalil Kamali

Proceedings of the 13th International Conference on Signal Processing and Communication Systems, 2019

A 1.5pJ/bit, 5-to-10Gbps Forwarded-Clock I/O with Per-Lane Clock De-Skew in a Low Power 28nm CMOS Process.

Anup P. Jose, Valentin Abramzon, Mohamed Elzeftawi, Michael Wang, Kyunglok Kim, Younghoon Song, Shiva Moballegh, Jalil Kamali, Amir Amirkhany

Proceedings of the IEEE Custom Integrated Circuits Conference, 2019

2016

23.3 A 6Gb/s 3-tap FFE transmitter and 5-tap DFE receiver in 65nm/0.18µm CMOS for next-generation 8K displays.

Mohammad Hekmat, Sanquan Song, Nancy Jaffari, Sabarish Sankaranarayanan, Chaofeng Huang, Minghui Han, Gaurav Malhotra, Jalil Kamali, Amir Amirkhany, Wei Xiong

Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016

2015

BER analysis of high speed links with nonlinearity.

Gaurav Malhotra, Jalil Kamali

Proceedings of the 49th Asilomar Conference on Signals, Systems and Computers, 2015

2012

Design of high-speed wireline transceivers for backplane communications in 28nm CMOS.

Jafar Savoj, Kenny C.-H. Hsieh, Parag Upadhyaya, Fu-Tai An, Jay Im, Xuewen Jiang, Jalil Kamali, Kang Wei Lai, Zhaoyin Daniel Wu, Elad Alon, Ken Chang

Proceedings of the IEEE 2012 Custom Integrated Circuits Conference, 2012

2005

Competition stimulates technology advances: experiences from ADSL development in Japan.

Guozhu Long, Jalil Kamali, Amir H. Fazlollahi, Vinay R. Rao

IEEE Commun. Mag., 2005