Kyunglok Kim

According to our database, Kyunglok Kim authored at least 5 papers between 2006 and 2019.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2019

A 1.5pJ/bit, 5-to-10Gbps Forwarded-Clock I/O with Per-Lane Clock De-Skew in a Low Power 28nm CMOS Process.

Anup P. Jose, Valentin Abramzon, Mohamed Elzeftawi, Michael Wang, Kyunglok Kim, Younghoon Song, Shiva Moballegh, Jalil Kamali, Amir Amirkhany

Proceedings of the IEEE Custom Integrated Circuits Conference, 2019

2016

Bio-Inspired Stretchable Absolute Pressure Sensor Network.

Yue Guo, Yu-Hung Li, Zhiqiang Guo, Kyunglok Kim, Fu-Kuo Chang, Shan X. Wang

Sensors, 2016

2008

Gate-Oxide Early Life Failure Prediction.

Tze Wee Chen, Kyunglok Kim, Young Moon Kim, Subhasish Mitra

Proceedings of the 26th IEEE VLSI Test Symposium (VTS 2008), April 27, 2008

Optimized Circuit Failure Prediction for Aging: Practicality and Promise.

Mridul Agarwal, Varsha Balakrishnan, Anshuman Bhuyan, Kyunglok Kim, Bipul C. Paul, Wenping Wang, Bo Yang, Yu Cao, Subhasish Mitra

Proceedings of the 2008 IEEE International Test Conference, 2008

2006

A 1.8dB NF 112mW Single-Chip Diversity Tuner for 2.6GHz S-DMB Applications.

Myung-woon Hwang, Sungho Beck, Sunki Min, Sanghoon Lee, Seungyup Yoo, Kyoohyun Lim, Hyosun Jung, Jeong-Cheol Lee, Seokyong Hong, ChangHee Lee, Kyunglok Kim, Hyunji Song, Gyu-Hyeong Cho, Sangwoo Han

Proceedings of the 2006 IEEE International Solid State Circuits Conference, 2006