Xuewen Jiang

According to our database, Xuewen Jiang authored at least 5 papers between 2003 and 2013.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2013

A Low-Power 0.5-6.6 Gb/s Wireline Transceiver Embedded in Low-Cost 28 nm FPGAs.

Jafar Savoj, Kenny C.-H. Hsieh, Fu-Tai An, J. Gong, Jay Im, Xuewen Jiang, Anup P. Jose, Vassili Kireev, Siok-Wei Lim, Arianne Roldan, D. Z. Turker, Parag Upadhyaya, Zhaoyin Daniel Wu, Ken Chang

IEEE J. Solid State Circuits, 2013

2012

A wide common-mode fully-adaptive multi-standard 12.5Gb/s backplane transceiver in 28nm CMOS.

Jafar Savoj, Kenny C.-H. Hsieh, Parag Upadhyaya, Fu-Tai An, Ade Bekele, Stanley Chen, Xuewen Jiang, Kang Wei Lai, Chi Fung Poon, Aman Sewani, Didem Turker, Karthik Venna, Zhaoyin Daniel Wu, Bruce Xu, Elad Alon, Ken Chang

Proceedings of the Symposium on VLSI Circuits, 2012

Design of high-speed wireline transceivers for backplane communications in 28nm CMOS.

Jafar Savoj, Kenny C.-H. Hsieh, Parag Upadhyaya, Fu-Tai An, Jay Im, Xuewen Jiang, Jalil Kamali, Kang Wei Lai, Zhaoyin Daniel Wu, Elad Alon, Ken Chang

Proceedings of the IEEE 2012 Custom Integrated Circuits Conference, 2012

2003

A highly integrated analog front-end for 3G.

Waleed Khalil, Tsung-Yuan Chang, Xuewen Jiang, Syed R. Naqvi, Babak Nikjou, James Tseng

IEEE J. Solid State Circuits, 2003

Fully integrated AFE for WCDMA.

Waleed Khalil, Tsung-Yuan Chang, Xuewen Jiang, Syed R. Naqvi, Babak Nikjou

Proceedings of the 2003 10th IEEE International Conference on Electronics, 2003