Jay Schleicher

According to our database1, Jay Schleicher authored at least 7 papers between 1998 and 2007.

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Bibliography

2007
Equivalence Verification of FPGA and Structured ASIC Implementations.
Proceedings of the FPL 2007, 2007

2006
A methodology for FPGA to structured-ASIC synthesis and verification.
Proceedings of the Conference on Design, Automation and Test in Europe: Designers' Forum, 2006

2005

2004
Improving FPGA Performance and Area Using an Adaptive Logic Module.
Proceedings of the Field Programmable Logic and Application, 2004

2002
Interconnect enhancements for a high-speed PLD architecture.
Proceedings of the ACM/SIGDA International Symposium on Field Programmable Gate Arrays, 2002

1999
A next generation architecture optimized for high density system level integration.
Proceedings of the IEEE 1999 Custom Integrated Circuits Conference, 1999

1998
Optimizations for a Highly Cost-Efficient Programmable Logic Architecture.
Proceedings of the 1998 ACM/SIGDA Sixth International Symposium on Field Programmable Gate Arrays, 1998


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