Richard Yuan

According to our database, Richard Yuan authored at least 4 papers between 2004 and 2006.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2006

A methodology for FPGA to structured-ASIC synthesis and verification.

Michael D. Hutton, Richard Yuan, Jay Schleicher, Gregg Baeckler, Sammy Cheung, Kar Keng Chua, Hee Kong Phoo

Proceedings of the Conference on Design, Automation and Test in Europe: Designers' Forum, 2006

Efficient SAT-based Boolean matching for FPGA technology mapping.

Sean Safarpour, Andreas G. Veneris, Gregg Baeckler, Richard Yuan

Proceedings of the 43rd Design Automation Conference, 2006

2005

The Stratix II logic and routing architecture.

David M. Lewis, Elias Ahmed, Gregg Baeckler, Vaughn Betz, Mark Bourgeault, David Cashman, David R. Galloway, Mike Hutton, Christopher Lane, Andy Lee, Paul Leventis, Sandy Marquardt, Cameron McClintock, Ketan Padalia, Bruce Pedersen, Giles Powell, Boris Ratchev, Srinivas Reddy, Jay Schleicher, Kevin Stevens, Richard Yuan, Richard Cliff, Jonathan Rose

Proceedings of the ACM/SIGDA 13th International Symposium on Field Programmable Gate Arrays, 2005

2004

Improving FPGA Performance and Area Using an Adaptive Logic Module.

Michael D. Hutton, Jay Schleicher, David M. Lewis, Bruce Pedersen, Richard Yuan, Sinan Kaptanoglu, Gregg Baeckler, Boris Ratchev, Ketan Padalia, Mark Bourgeault, Andy Lee, Henry Kim, Rahul Saini

Proceedings of the Field Programmable Logic and Application, 2004