Jayanth Gopinath

According to our database, Jayanth Gopinath authored at least 6 papers between 2021 and 2025.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2025

DEFending Integrated Circuit Layouts.

Jitendra Bhandari, Jayanth Gopinath, Mohammed Ashraf, Johann Knechtel, Ozgur Sinanoglu, Ramesh Karri

IEEE Trans. Inf. Forensics Secur., 2025

2024

Safeguarding the Silicon: Strategies for Integrated Circuit Layout Protection.

Jitendra Bhandari, Jayanth Gopinath, Mohammed Ashraf, Johann Knechtel, Ozgur Sinanoglu, Ramesh Karri

Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2024

2023

DEFending Integrated Circuit Layouts.

Jitendra Bhandari, Jayanth Gopinath, Mohammed Ashraf, Johann Knechtel, Ramesh Karri

IACR Cryptol. ePrint Arch., 2023

HAAC: A Hardware-Software Co-Design to Accelerate Garbled Circuits.

Jianqiao Mo, Jayanth Gopinath, Brandon Reagen

Proceedings of the 50th Annual International Symposium on Computer Architecture, 2023

2022

Benchmarking Security Closure of Physical Layouts: ISPD 2022 Contest.

Johann Knechtel, Jayanth Gopinath, Mohammed Ashraf, Jitendra Bhandari, Ozgur Sinanoglu, Ramesh Karri

Proceedings of the ISPD 2022: International Symposium on Physical Design, Virtual Event, Canada, March 27, 2022

2021

Security Closure of Physical Layouts ICCAD Special Session Paper.

Johann Knechtel, Jayanth Gopinath, Jitendra Bhandari, Mohammed Ashraf, Hussam Amrouch, Shekhar Borkar, Sung Kyu Lim, Ozgur Sinanoglu, Ramesh Karri

Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2021