Jeffrey H. Dreibelbis

According to our database, Jeffrey H. Dreibelbis authored at least 9 papers between 1995 and 2007.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of three.

2007

A 1.0GHz multi-banked embedded DRAM in 65nm CMOS featuring concurrent refresh and hierarchical BIST.

Darren Anand, Jim Covino, Jeffrey H. Dreibelbis, John A. Fifield, Kevin W. Gorman, Mark Jacunski, Jake Paparelli, Gary Pomichter, Dale E. Pontius, Michael Roberge, Stephen Sliva

Proceedings of the IEEE 2007 Custom Integrated Circuits Conference, 2007

2005

A 500-MHz multi-banked compilable DRAM macro with direct write and programmable pipelining.

John E. Barth Jr., Darren Anand, Steve Burns, Jeffrey H. Dreibelbis, John A. Fifield, Kevin W. Gorman, Michael R. Nelms, Erik Nelson, Adrian Paparelli, Gary Pomichter, Dale E. Pontius, Stephen Sliva

IEEE J. Solid State Circuits, 2005

2002

Embedded DRAM design and architecture for the IBM 0.11-µm ASIC offering.

John E. Barth Jr., Jeffrey H. Dreibelbis, Eric A. Nelson, Darren Anand, Gary Pomichter, Peter Jakobsen, Michael R. Nelms, Jeffrey Leach, George M. Belansek

IBM J. Res. Dev., 2002

2001

BIST-Based Bitfail Mapping of an Embedded DRAM.

Brian R. Kessler, Jeffrey H. Dreibelbis, Tim McMahon, Joshua S. McCloy, Rex Kho

Proceedings of the 9th IEEE International Workshop on Memory Technology, 2001

Test and repair of large embedded DRAMs. 2.

Eric A. Nelson, Jeffrey H. Dreibelbis, Roderick McConnell

Proceedings of the Proceedings IEEE International Test Conference 2001, Baltimore, MD, USA, 30 October, 2001

Test and repair of large embedded DRAMs. I.

Roderick McConnell, Rochit Rajsuman, Eric A. Nelson, Jeffrey H. Dreibelbis

Proceedings of the Proceedings IEEE International Test Conference 2001, Baltimore, MD, USA, 30 October, 2001

Embedded DRAM built in self test and methodology for test insertion.

Peter Jakobsen, Jeffrey H. Dreibelbis, Gary Pomichter, Darren Anand, John Barth, Michael R. Nelms, Jeffrey Leach, George M. Belansek

Proceedings of the Proceedings IEEE International Test Conference 2001, Baltimore, MD, USA, 30 October, 2001

1998

Processor-based built-in self-test for embedded DRAM.

Jeffrey H. Dreibelbis, John Barth, Howard L. Kalter, Rex Kho

IEEE J. Solid State Circuits, 1998

1995

Multipurpose DRAM architecture for optimal power, performance, and product flexibility.

Wayne F. Ellis, John E. Barth Jr., Sri Divakaruni, Jeffrey H. Dreibelbis, Anatol Furman, Erik L. Hedberg, Hsing-San Lee, Thomas M. Maffitt, Christopher P. Miller, Charles H. Stapper, Howard L. Kalter

IBM J. Res. Dev., 1995