Jiangfang Yi

Orcid: 0000-0003-4401-3551

According to our database1, Jiangfang Yi authored at least 9 papers between 2010 and 2023.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2023
FlexPointer: Fast Address Translation Based on Range TLB and Tagged Pointers.
ACM Trans. Archit. Code Optim., June, 2023

2019
Coalesced TLB to Exploit Diverse Contiguity of Memory Mapping.
CoRR, 2019

2018
Making a real processor step by step using RISC-VISA.
Proceedings of ACM Turing Celebration Conference - China, 2018

2013
VFCC: A verification framework of cache coherence using parallel simulation.
Proceedings of the 18th Asia and South Pacific Design Automation Conference, 2013

2012
Active Store Window: Enabling Far Store-Load Forwarding with Scalability and Complexity-Efficiency.
J. Comput. Sci. Technol., 2012

SOLE: Speculative one-cycle load execution with scalability, high-performance and energy-efficiency.
Proceedings of the 30th International IEEE Conference on Computer Design, 2012

S/DC: A storage and energy efficient data prefetcher.
Proceedings of the 2012 Design, Automation & Test in Europe Conference & Exhibition, 2012

2011
CGA: Combining cluster analysis with genetic algorithm for regression suite reduction of microprocessors.
Proceedings of the IEEE 24th International SoC Conference, SOCC 2011, Taipei, Taiwan, 2011

2010
Research Progress of UniCore CPUs and PKUnity SoCs.
J. Comput. Sci. Technol., 2010


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