Jianzhuang Lu

According to our database, Jianzhuang Lu authored at least 16 papers between 2003 and 2022.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2022

Towards Convolutional Neural Network Acceleration and Compression Based on Simonk-Means.

Mingjie Wei, Yunping Zhao, Xiaowen Chen, Chen Li, Jianzhuang Lu

Sensors, 2022

TTQR: A Traffic- and Thermal-Aware Q-Routing for 3D Network-on-Chip.

Hanyan Liu, Xiaowen Chen, Yunping Zhao, Chen Li, Jianzhuang Lu

Sensors, 2022

Convolutional Neural Network Accelerator for Compression Based on Simon k-means.

Mingjie Wei, Yunping Zhao, Jianzhuang Lu, Xiaowen Chen, Chen Li, Zerun Li

Proceedings of the International Joint Conference on Neural Networks, 2022

HCER: A High Cost-Effectiveness Multi-Bit Fault-Tolerant NoC Router.

Wencai Gao, Xiaowen Chen, Chen Li, Jianzhuang Lu, Hanyan Liu

Proceedings of the 24th IEEE Int Conf on High Performance Computing & Communications; 8th Int Conf on Data Science & Systems; 20th Int Conf on Smart City; 8th Int Conf on Dependability in Sensor, 2022

2021

Vectorized Winograd's algorithm for Convolution Neural networks.

Yuekai Zhao, Jianzhuang Lu, Xiaowen Chen

Proceedings of the 2021 IEEE Intl Conf on Parallel & Distributed Processing with Applications, Big Data & Cloud Computing, Sustainable Computing & Communications, Social Computing & Networking (ISPA/BDCloud/SocialCom/SustainCom), New York City, NY, USA, September 30, 2021

Accelerating Depthwise Separable Convolutions with Vector Processor.

Yuekai Zhao, Jianzhuang Lu, Xiaowen Chen

Proceedings of the Artificial Neural Networks and Machine Learning - ICANN 2021, 2021

2020

An Accelerator Design Using a MTCA Decomposition Algorithm for CNNs.

Yunping Zhao, Jianzhuang Lu, Xiaowen Chen

Sensors, 2020

Dynamic GMMU Bypass for Address Translation in Multi-GPU Systems.

Jinhui Wei, Jianzhuang Lu, Qi Yu, Chen Li, Yunping Zhao

Proceedings of the Network and Parallel Computing, 2020

A Research and Design of Lightweight Convolutional Neural Networks Accelerator Based on Systolic Array Structure.

Yunping Zhao, Xiaowen Chen, Rui Xu, Jinhui Wei, Jianzhuang Lu, Bo Yuan

Proceedings of the ICRAI 2020: 6th International Conference on Robotics and Artificial Intelligence, 2020

A Design of GEMM Parallel Computing Accelerator Based on Vector SIMD Technology.

Yunping Zhao, Jianzhuang Lu, Xiaowen Chen

Proceedings of the ICCTA 2020: 6th International Conference on Computer and Technology Applications, 2020

2015

Achieving Memory Access Equalization Via Round-Trip Routing Latency Prediction in 3D Many-Core NoCs.

Xiaowen Chen, Zhonghai Lu, Yang Li, Axel Jantsch, Xueqian Zhao, Shuming Chen, Yang Guo, Zonglin Liu, Jianzhuang Lu, Jianghua Wan, Shuwei Sun, Shenggang Chen, Hu Chen

Proceedings of the 2015 IEEE Computer Society Annual Symposium on VLSI, 2015

2011

Design and chip implementation of a heterogeneous multi-core DSP.

Shuming Chen, Xiaowen Chen, Yi Xu, Jianghua Wan, Jianzhuang Lu, Xiangyuan Liu, Shenggang Chen

Proceedings of the 16th Asia South Pacific Design Automation Conference, 2011

2010

YHFT-QDSP: High-Performance Heterogeneous Multi-Core DSP.

Shuming Chen, Jianghua Wan, Jianzhuang Lu, Zhong Liu, Hai-Yan Sun, Yong-Jie Sun, Hengzhu Liu, Xiang-Yuan Liu, Zhentao Li, Yi Xu, Xiaowen Chen

J. Comput. Sci. Technol., 2010

Supporting Efficient Synchronization in Multi-core NoCs Using Dynamic Buffer Allocation Technique.

Xiaowen Chen, Zhonghai Lu, Axel Jantsch, Shuming Chen, Jianzhuang Lu, Hucheng Wu

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2010

2004

A Case of SCMP with TLS.

Jianzhuang Lu, Chunyuan Zhang, Zhiying Wang, Yun Cheng, Dan Wu

Proceedings of the Parallel and Distributed Processing and Applications, 2004

2003

Predicate Analysis Based on Path Information.

Li Shen, Zhiying Wang, Jianzhuang Lu

Proceedings of the Advanced Parallel Programming Technologies, 5th International Workshop, 2003